arch/x86/entry/entry_fred.c

111

SYSVEC(THRESHOLD_APIC_VECTOR, threshold),

arch/x86/include/asm/idtentry.h

692

DECLARE_IDTENTRY_SYSVEC(THRESHOLD_APIC_VECTOR, sysvec_threshold);

arch/x86/kernel/cpu/mce/amd.c

525

if (reserved < 0 && !setup_APIC_eilvt(new, THRESHOLD_APIC_VECTOR,

arch/x86/kernel/cpu/mce/amd.c

717

if (!setup_APIC_eilvt(offset, THRESHOLD_APIC_VECTOR, APIC_DELIVERY_MODE_FIXED, 0))

arch/x86/kernel/cpu/mce/inject.c

429

asm volatile("int %0" :: "i" (THRESHOLD_APIC_VECTOR));

arch/x86/kernel/cpu/mce/intel.c

422

apic_write(APIC_LVTCMCI, THRESHOLD_APIC_VECTOR|APIC_DM_FIXED);

arch/x86/kernel/cpu/mce/threshold.c

32

THRESHOLD_APIC_VECTOR);

arch/x86/kernel/cpu/mce/threshold.c

39

trace_threshold_apic_entry(THRESHOLD_APIC_VECTOR);

arch/x86/kernel/cpu/mce/threshold.c

42

trace_threshold_apic_exit(THRESHOLD_APIC_VECTOR);

arch/x86/kernel/idt.c

146

INTG(THRESHOLD_APIC_VECTOR, asm_sysvec_threshold),