TPM_STS_VALID
TPM_STS_DATA_AVAIL | TPM_STS_VALID,
ret = wait_for_stat(chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
TPM_STS_VALID, chip->timeout_b,
wait_for_stat(chip, TPM_STS_VALID, chip->timeout_c, &status);
wait_for_stat(chip, TPM_STS_VALID,
wait_for_stat(chip, TPM_STS_VALID, chip->timeout_c, &status);
.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
TPM_STS_DATA_AVAIL | TPM_STS_VALID,
TPM_STS_DATA_AVAIL | TPM_STS_VALID,
chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
TPM_STS_VALID, chip->timeout_c,
TPM_STS_VALID |
TPM_STS_VALID |
TPM_STS_VALID | TPM_STS_EXPECT,
TPM_STS_VALID,
.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
TPM_STS_VALID)
.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
TPM_STS_DATA_AVAIL | TPM_STS_VALID,
if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
sts_mask &= ~TPM_STS_VALID;
(chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
return ((status == TPM_STS_VALID) ||
(status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
sts_mask = mask & (TPM_STS_VALID | TPM_STS_DATA_AVAIL |
u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL;
rc = tpm_cr50_i2c_get_burst_and_status(chip, TPM_STS_VALID, &burstcnt, &status);
u8 mask = TPM_STS_VALID;
rc = tpm_cr50_i2c_get_burst_and_status(chip, TPM_STS_VALID, &burstcnt, &status);
.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,