drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1067

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

110

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1219

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1260

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1307

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1326

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1342

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1376

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1395

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

180

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

228

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

405

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

46

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

543

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

591

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

608

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

625

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

642

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

657

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

719

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

747

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

776

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

806

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

848

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

875

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

89

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

901

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

917

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

130

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

149

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

160

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

205

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

220

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

308

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

377

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

447

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

46

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

62

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

84

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.c

47

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

948

kfree(TO_DCN30_DPP(*dpp));

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

942

kfree(TO_DCN30_DPP(*dpp));