drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

190

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

211

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

268

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

293

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

420

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

443

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

501

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

519

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

534

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

97

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

164

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

236

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

311

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

381

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

389

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

401

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

423

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

437

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

466

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

495

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

569

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

590

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

619

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

646

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

656

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

666

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

693

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

708

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

731

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

773

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

800

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

831

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

879

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

161

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

617

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

596

kfree(TO_DCN10_DPP(*dpp));