arch/sh/kernel/cpu/sh4a/setup-sh7757.c

1065

{ INT2PRI1, 0, 32, 8, { TMU3, TMU4, TMU5, SDHI } },

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

888

INTC_VECT(TMU5, 0xe40),

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

950

INTC_GROUP(TMU345, TMU3, TMU4, TMU5),

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

287

INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

298

INTC_GROUP(TMU345, TMU3, TMU4, TMU5),

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

317

{ 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },

arch/sh/kernel/cpu/sh4a/setup-sh7770.c

362

INTC_VECT(TMU5, 0x4c0), INTC_VECT(TMU5_TICPI, 0x4e0),

arch/sh/kernel/cpu/sh4a/setup-sh7770.c

407

INTC_GROUP(TMU, TMU0, TMU1, TMU2, TMU2_TICPI, TMU3, TMU4, TMU5,

arch/sh/kernel/cpu/sh4a/setup-sh7770.c

446

{ TMU4, TMU5, TMU5_TICPI, TMU6 } },

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

342

INTC_VECT(TMU5, 0xe40),

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

352

INTC_GROUP(TMU345, TMU3, TMU4, TMU5),

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

366

{ 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

424

INTC_VECT(TMU5, 0xe40),

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

435

INTC_GROUP(TMU345, TMU3, TMU4, TMU5),

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

464

{ 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, } },

arch/sh/kernel/cpu/sh4a/setup-shx3.c

199

INTC_VECT(TMU4, 0x480), INTC_VECT(TMU5, 0x4a0),

arch/sh/kernel/cpu/sh4a/setup-shx3.c

269

0, TMU5, TMU4, TMU3, TMU2, TMU1, TMU0, 0, },

arch/sh/kernel/cpu/sh4a/setup-shx3.c

291

{ 0xfe410800, 0, 32, 4, /* INT2PRI0 */ { 0, HUDII, TMU5, TMU4,