arch/sh/kernel/cpu/sh4/setup-sh7750.c

211

TMU4, TMU3,

arch/sh/kernel/cpu/sh4/setup-sh7750.c

254

INTC_VECT(TMU3, 0xb00), INTC_VECT(TMU4, 0xb80),

arch/sh/kernel/cpu/sh4/setup-sh7750.c

260

0, 0, 0, 0, 0, 0, TMU4, TMU3,

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

1065

{ INT2PRI1, 0, 32, 8, { TMU3, TMU4, TMU5, SDHI } },

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

887

INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

950

INTC_GROUP(TMU345, TMU3, TMU4, TMU5),

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

286

INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

298

INTC_GROUP(TMU345, TMU3, TMU4, TMU5),

arch/sh/kernel/cpu/sh4a/setup-sh7763.c

317

{ 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },

arch/sh/kernel/cpu/sh4a/setup-sh7770.c

361

INTC_VECT(TMU3, 0x480), INTC_VECT(TMU4, 0x4a0),

arch/sh/kernel/cpu/sh4a/setup-sh7770.c

407

INTC_GROUP(TMU, TMU0, TMU1, TMU2, TMU2_TICPI, TMU3, TMU4, TMU5,

arch/sh/kernel/cpu/sh4a/setup-sh7770.c

444

{ TMU1, TMU2, TMU2_TICPI, TMU3 } },

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

341

INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

352

INTC_GROUP(TMU345, TMU3, TMU4, TMU5),

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

366

{ 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

423

INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

435

INTC_GROUP(TMU345, TMU3, TMU4, TMU5),

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

464

{ 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, } },

arch/sh/kernel/cpu/sh4a/setup-sh7786.c

509

INTC_VECT(TMU2, 0x7a0), INTC_VECT(TMU3, 0x7c0),

arch/sh/kernel/cpu/sh4a/setup-sh7786.c

582

TMU2, TMU3, 0, }, INTC_SMP_BALANCING(INT2DISTCR1) },

arch/sh/kernel/cpu/sh4a/setup-sh7786.c

619

{ 0xfe410820, 0, 32, 8, /* INT2PRI8 */ { SCIF1, TMU2, TMU3, 0 } },

arch/sh/kernel/cpu/sh4a/setup-shx3.c

198

INTC_VECT(TMU2, 0x440), INTC_VECT(TMU3, 0x460),

arch/sh/kernel/cpu/sh4a/setup-shx3.c

269

0, TMU5, TMU4, TMU3, TMU2, TMU1, TMU0, 0, },

arch/sh/kernel/cpu/sh4a/setup-shx3.c

292

TMU3, TMU2, TMU1, TMU0 } },