BIT_14
arg1 |= BIT_14 | rx_tx << 15;
#define PCI_64BIT_SLOT BIT_14 /* PCI 64-bit slot indicator. */
#define TP_PARITY BIT_14 /* Parity checking. */
#define SF_TRANSFER_CMPL BIT_14 /* Transfer Complete. */
#define ADD_FO3_NO_ABT_ON_LINK_DOWN BIT_14
#define MBX_14 BIT_14
#define PO_DIS_APP_TAG_VALD BIT_14 /* disable REF Tag validation */
#define RDP_PORT_SPEED_2GB BIT_14
#define DT_ISP8021 BIT_14
#define QLA_ABTS_FW_ENABLED(_ha) ((_ha)->fw_attributes_ext[0] & BIT_14)
#define FW_ATTR_H_NVME_UPDATED BIT_14
#define NVR_WRT_ENABLE BIT_14 /* Write enable */
#define VCO_END_OF_DATA BIT_14
#define FAC_OPT_REQUESTOR_ID BIT_14
#define FO3_NO_ABTS_ON_LINKDOWN BIT_14
#define PDF_TASK_RETRY_ID BIT_14
#define TMF_CLEAR_ACA BIT_14
#define ECF_PAYLOAD_DESCR_MASK (BIT_15|BIT_14|BIT_13)
case BIT_14:
cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
ha->sf_init_cb->flags |= cpu_to_le16(BIT_14);
if (mcp->mb[7] & BIT_14) {
0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
nv->firmware_options_2 |= cpu_to_le32(BIT_14);
icb->firmware_options_1 |= cpu_to_le32(BIT_14);
nv->firmware_options_2 |= cpu_to_le32(BIT_14);
icb->firmware_options_1 |= cpu_to_le32(BIT_14);
#define CTIO7_FLAGS_TERMINATE BIT_14
TRC_CTIO_STRANGE = BIT_14,
#define OF_TERM_EXCH BIT_14 /* Terminate exchange */