arch/arm64/include/asm/hugetlb.h

90

__flush_tlb_range(vma, start, end, PAGE_SIZE, last_level, TLBI_TTL_UNKNOWN);

arch/arm64/include/asm/tlb.h

28

return TLBI_TTL_UNKNOWN;

arch/arm64/include/asm/tlb.h

50

return TLBI_TTL_UNKNOWN;

arch/arm64/include/asm/tlbflush.h

551

__flush_tlb_range(vma, start, end, PAGE_SIZE, false, TLBI_TTL_UNKNOWN);

arch/arm64/include/asm/tlbflush.h

570

TLBI_TTL_UNKNOWN, false, lpa2_is_enabled());

arch/arm64/kvm/hyp/nvhe/tlb.c

225

TLBI_TTL_UNKNOWN);

arch/arm64/kvm/hyp/pgtable.c

493

__tlbi_level(vae2is, __TLBI_VADDR(ctx->addr, 0), TLBI_TTL_UNKNOWN);

arch/arm64/kvm/hyp/pgtable.c

908

TLBI_TTL_UNKNOWN);

arch/arm64/kvm/hyp/vhe/tlb.c

175

TLBI_TTL_UNKNOWN);