TIM_SR
writel_relaxed(0, timer_of_base(to) + TIM_SR);
writel_relaxed(0, timer_of_base(to) + TIM_SR);
regmap_write(priv->regmap, TIM_SR, ~TIM_SR_CC_IF(ch));
regmap_write(priv->regmap, TIM_SR, (u32)~TIM_SR_UIF);
regmap_read(priv->regmap, TIM_SR, &sr);
regmap_write(priv->regmap, TIM_SR, clr);
ret = regmap_write(regmap, TIM_SR, 0);
regmap_write(regmap, TIM_SR, 0);