TIM_CCER
if (!regmap_test_bits(priv->regmap, TIM_CCER, cc->ccer_bits))
regmap_set_bits(priv->regmap, TIM_CCER, cc->ccer_bits);
regmap_clear_bits(priv->regmap, TIM_CCER, cc->ccer_bits);
regmap_read(priv->regmap, TIM_CCER, &ccer);
regmap_read(priv->regmap, TIM_CCER, &ccer_backup);
regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);
regmap_read(priv->regmap, TIM_CCER, &ccer);
regmap_write(priv->regmap, TIM_CCER, ccer_backup);
regmap_read(priv->regmap, TIM_CCER, &ccer);
regmap_read(priv->regmap, TIM_CCER, &ccer);
regmap_read(priv->regmap, TIM_CCER, &val);
ret = regmap_read(priv->regmap, TIM_CCER, &wfhw->ccer);
ret = regmap_read(priv->regmap, TIM_CCER, &ccer);
ret = regmap_update_bits(priv->regmap, TIM_CCER, mask, wfhw->ccer);
regmap_write(priv->regmap, TIM_CCER, ccer);
ret = regmap_read(priv->regmap, TIM_CCER, &ccer);
ret = regmap_write(priv->regmap, TIM_CCER, ccer);
regmap_set_bits(priv->regmap, TIM_CCER, ccen);
regmap_read(dev->regmap, TIM_CCER, &ccer);
regmap_clear_bits(priv->regmap, TIM_CCER, ccen);
regmap_update_bits(priv->regmap, TIM_CCER, pwm->hwpwm < 2 ?
regmap_write(priv->regmap, TIM_CCER, 0);
regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
regmap_read(priv->regmap, TIM_CCER, &ccer);
regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CC1NE);
regmap_read(regmap, TIM_CCER, &ccer_backup);
regmap_set_bits(regmap, TIM_CCER, TIM_CCER_CCXE);
regmap_read(regmap, TIM_CCER, &ccer);
regmap_write(regmap, TIM_CCER, ccer_backup);