drivers/clocksource/timer-keystone.c

198

TIMER_NAME, event_dev);

drivers/clocksource/timer-keystone.c

212

event_dev->name = TIMER_NAME;

drivers/clocksource/timer-msc313e.c

159

.name = TIMER_NAME,

drivers/clocksource/timer-msc313e.c

224

return clocksource_mmio_init(timer_of_base(&to), TIMER_NAME, timer_of_rate(&to), 300, 32,

drivers/clocksource/timer-rockchip.c

137

pr_err("Failed to get base address for '%s'\n", TIMER_NAME);

drivers/clocksource/timer-rockchip.c

149

pr_err("Failed to get pclk for '%s'\n", TIMER_NAME);

drivers/clocksource/timer-rockchip.c

155

pr_err("Failed to enable pclk for '%s'\n", TIMER_NAME);

drivers/clocksource/timer-rockchip.c

163

pr_err("Failed to get timer clock for '%s'\n", TIMER_NAME);

drivers/clocksource/timer-rockchip.c

179

pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME);

drivers/clocksource/timer-rockchip.c

221

ce->name = TIMER_NAME;

drivers/clocksource/timer-rockchip.c

232

TIMER_NAME, ce);

drivers/clocksource/timer-rockchip.c

235

TIMER_NAME, ret);

drivers/clocksource/timer-rockchip.c

271

TIMER_NAME, rk_clksrc->freq, 250, 32,

drivers/clocksource/timer-rockchip.c

299

pr_err("Too many timer definitions for '%s'\n", TIMER_NAME);

drivers/clocksource/timer-sprd.c

129

.name = TIMER_NAME,