drivers/clocksource/timer-sun4i.c

180

timer_of_base(&to) + TIMER_CTL_REG(1));

drivers/clocksource/timer-sun4i.c

202

timer_of_base(&to) + TIMER_CTL_REG(0));

drivers/clocksource/timer-sun4i.c

58

u32 val = readl(base + TIMER_CTL_REG(timer));

drivers/clocksource/timer-sun4i.c

59

writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer));

drivers/clocksource/timer-sun4i.c

72

u32 val = readl(base + TIMER_CTL_REG(timer));

drivers/clocksource/timer-sun4i.c

80

base + TIMER_CTL_REG(timer));

drivers/clocksource/timer-sun5i.c

181

base + TIMER_CTL_REG(1));

drivers/clocksource/timer-sun5i.c

68

u32 val = readl(ce->base + TIMER_CTL_REG(timer));

drivers/clocksource/timer-sun5i.c

69

writel(val & ~TIMER_CTL_ENABLE, ce->base + TIMER_CTL_REG(timer));

drivers/clocksource/timer-sun5i.c

81

u32 val = readl(ce->base + TIMER_CTL_REG(timer));

drivers/clocksource/timer-sun5i.c

89

ce->base + TIMER_CTL_REG(timer));