TIMER_CTL_REG
timer_of_base(&to) + TIMER_CTL_REG(1));
timer_of_base(&to) + TIMER_CTL_REG(0));
u32 val = readl(base + TIMER_CTL_REG(timer));
writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer));
u32 val = readl(base + TIMER_CTL_REG(timer));
base + TIMER_CTL_REG(timer));
base + TIMER_CTL_REG(1));
u32 val = readl(ce->base + TIMER_CTL_REG(timer));
writel(val & ~TIMER_CTL_ENABLE, ce->base + TIMER_CTL_REG(timer));
u32 val = readl(ce->base + TIMER_CTL_REG(timer));
ce->base + TIMER_CTL_REG(timer));