BIT7
#define BT_INFO_8192E_2ANT_B_FTP BIT7
#define BT_INFO_8723B_1ANT_B_FTP BIT7
#define BT_INFO_8723B_2ANT_B_FTP BIT7
#define BT_INFO_8821A_1ANT_B_FTP BIT7
#define BT_INFO_8821A_2ANT_B_FTP BIT7
#define ALGO_TRACE_SW BIT7
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, BIT7 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0 \
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0 \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x80, BIT7 \
#define DATAOUT BIT7
#define LPFC_SLI4_INTR7 BIT7
viafb_write_reg_mask(CR91, VIACR, 0, BIT7);
viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT6 + BIT7);
BIT5 + BIT6 + BIT7);
viafb_write_reg_mask(SR1B, VIASR, 0x00, BIT7 + BIT6);
viafb_write_reg_mask(SR1B, VIASR, 0xC0, BIT7 + BIT6);
viafb_write_reg_mask(CR6A, VIACR, BIT7, BIT7);
viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT7);
viafb_write_reg_mask(CR11, VIACR, BIT7, BIT7);
viafb_write_reg_mask(CR11, VIACR, 0, BIT7);
viafb_write_reg_mask(CR03, VIACR, 0x80, BIT7);
viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6);
viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7);
viafb_write_reg_mask(CRD3, VIACR, 0xC0, BIT6 + BIT7);
viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7);
viafb_write_reg_mask(CRD2, VIACR, 0x80, BIT7);
viafb_write_reg_mask(CRD2, VIACR, 0xC0, BIT6 + BIT7);
viafb_write_reg_mask(CR91, VIACR, 0, BIT6 + BIT7);
viafb_write_reg_mask(CRD3, VIACR, 0, BIT6 + BIT7);
viafb_write_reg_mask(CRD2, VIACR, 0, BIT7);
viafb_write_reg_mask(CRD2, VIACR, 0, BIT6 + BIT7);
BIT7 + BIT2 + BIT1 + BIT0);
viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7);
viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7);
viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7);
viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7);