TH_INTR_UP_DN_EN

644

r = REG_SET_MASK(r, zn->sg->thermctl_isr_mask, TH_INTR_UP_DN_EN);

36

#define THERM_IRQ_MEM_MASK (TH_INTR_UP_DN_EN << 24)

37

#define THERM_IRQ_GPU_MASK (TH_INTR_UP_DN_EN << 16)

38

#define THERM_IRQ_CPU_MASK (TH_INTR_UP_DN_EN << 8)

39

#define THERM_IRQ_TSENSE_MASK (TH_INTR_UP_DN_EN << 0)