THC_SWDMA
dma_ctx->dma_config[THC_SWDMA].dma_channel = THC_SWDMA;
dma_ctx->dma_config[THC_SWDMA].dir = DMA_FROM_DEVICE;
dma_ctx->dma_config[THC_SWDMA].prd_tbl_num = 1;
dma_ctx->dma_config[THC_SWDMA].prd_base_addr_high = THC_M_PRT_RPRD_BA_HI_SW_OFFSET;
dma_ctx->dma_config[THC_SWDMA].prd_base_addr_low = THC_M_PRT_RPRD_BA_LOW_SW_OFFSET;
dma_ctx->dma_config[THC_SWDMA].prd_cntrl = THC_M_PRT_RPRD_CNTRL_SW_OFFSET;
dma_ctx->dma_config[THC_SWDMA].dma_cntrl = THC_M_PRT_READ_DMA_CNTRL_SW_OFFSET;
dma_set_max_packet_size(dev, mps_swdma, &dev->dma_ctx->dma_config[THC_SWDMA]);
case THC_SWDMA:
dma_set_start_bit(dev, &dev->dma_ctx->dma_config[THC_SWDMA]);
ret = thc_wait_for_dma_pause(dev, THC_SWDMA);
if (!(&dev->dma_ctx->dma_config[THC_SWDMA])->is_enabled) {
ret = thc_dma_read(dev, &dev->dma_ctx->dma_config[THC_SWDMA], read_buff, read_len, NULL);