BIT_5
#define QLCNIC_FW_CAPABILITY_SET_DRV_VER BIT_5
arg1 |= (BIT_2 | BIT_5);
arg1 |= (BIT_3 | BIT_5);
esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
#define QLCNIC_ENCAP_DO_L4_CSUM BIT_5
#define QLCNIC_DUMP_RD_SAVE BIT_5
if (status & BIT_5)
status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_5 |
cfg1 = RD_REG_WORD(®->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6);
mb[1] |= BIT_5;
mb[2] |= BIT_5;
if ((mb[2] & BIT_5) && ((mb[6] >> 8) & 0xff) >= 2)
return BIT_5;
return BIT_5 | BIT_6;
#define ISP_CFG1_F64 BIT_4|BIT_5 /* 128-byte FIFO threshold */
#define ISP_CFG1_F32 BIT_5 /* 128-byte FIFO threshold */
#define TP_PPR BIT_5 /* PPR */
#define FO1_DISABLE_100MS_LOS_WAIT BIT_5
#define ADD_FO2_ENABLE_SEL_CLS2 BIT_5
#define MBX_5 BIT_5
#define CF_READ BIT_5
#define PO_DISABLE_INCR_REF_TAG BIT_5
#define RF_INV_E_ORDER BIT_5 /* Invalid entry order. */
#define NOTIFY24XX_FLAGS_FCSP BIT_5
#define NVME_PRLI_SP_INITIATOR BIT_5
#define FCF_ASYNC_ACTIVE BIT_5
#define SRB_CRC_CTX_DSD_VALID BIT_5 /* DIF: dsd_list valid */
#define DT_ISP6312 BIT_5
#define FW_ATTR_EXT0_EDIF BIT_5
#define DFLG_DEV_FAILED BIT_5
#define SRB_LOGIN_FCSP BIT_5
#define FC_LL_I BIT_5 /* Intermidiate*/
#define FC_TEC_SL BIT_5 /* short wave with OFC */
#define FC_MED_MI BIT_5 /* Min Coax */
#define FC_SP_16 BIT_5
#define HCCR_RISC_PAUSE BIT_5 /* Pause mode bit */
#define CSRX_MAX_WRT_BURST_MASK (BIT_5|BIT_4)
#define HCCRX_RISC_RESET BIT_5 /* RISC Reset mode bit. */
VP_FLAGS_NAME_VALID = BIT_5,
#define FO2_ENABLE_SEL_CLASS2 BIT_5
#define PDF_FCP2_CONF BIT_5
#define LCF_SKIP_PRLI BIT_5 /* Skip PRLI after PLOGI. */
#define LCF_IMPL_LOGO_ALL BIT_5 /* Implicit LOGO to all ports. */
(BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
ha->fw_options[10] |= BIT_5 |
(BIT_7 | BIT_6 | BIT_5)) >> 5;
(BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
ha->fw_options[11] |= BIT_5 |
nv->firmware_options[1] = BIT_7 | BIT_5;
nv->add_firmware_options[0] = BIT_5;
nv->add_firmware_options[1] = BIT_5 | BIT_4;
nv->firmware_options[1] = BIT_7 | BIT_5;
nv->add_firmware_options[0] = BIT_5;
nv->add_firmware_options[1] = BIT_5 | BIT_4;
nv->firmware_options[1] = BIT_5;
nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
nv->firmware_options[1] |= (BIT_5 | BIT_0);
nv->add_firmware_options[1] |= BIT_5 | BIT_4;
if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
(BIT_5 | BIT_4)) {
nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
nv->add_firmware_options[0] |= BIT_5;
(icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
(BIT_6 | BIT_5 | BIT_4)) >> 4;
ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
(BIT_6 | BIT_5 | BIT_4)) >> 4;
} else if (iop[0] & BIT_5)
mcp->mb[1] |= BIT_5;
vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
if (!(subcode & (BIT_2 | BIT_5)))
if (subcode & BIT_5)
if ((pd->prli_svc_param_word_3[0] & BIT_5) == 0)
mcp->in_mb |= BIT_5;
options |= BIT_5;
options |= BIT_5;
if (sfp[0] & BIT_2 || sfp[1] & (BIT_6|BIT_5))
if ((flash_data & BIT_5) && cnt > 2)
nv->firmware_options_1 |= cpu_to_le32(BIT_5);
tmp = ~(BIT_4|BIT_5|BIT_6);
nv->firmware_options_1 |= cpu_to_le32(BIT_5);
tmp = ~(BIT_4|BIT_5|BIT_6);
vpmod->options_idx1 &= ~BIT_5;
#define NOTIFY_ACK_FLAGS_FCSP BIT_5
#define CTIO7_FLAGS_EXPLICIT_CONFORM BIT_5
#define NOTIFY_ACK_CLEAR_LIP_RESET BIT_5
#define OF_EXPL_CONF BIT_5 /* Explicit Confirmation Requested */
TRC_XMIT_STATUS = BIT_5,
SET_BITVAL(sess->discovery_logout_en, options, BIT_5);
SET_BITVAL(conn->tcp_nagle_disable, options, BIT_5);