BIT_17
#define QLC_83XX_FW_CAP_LRO_MSS BIT_17
#define MBX_17 BIT_17
#define DT_ISPFX00 BIT_17
#define CSRX_DMA_ACTIVE BIT_17 /* DMA Active status. */
#define GPDX_DATA_UPDATE_MASK (BIT_17|BIT_16)
#define GPDX_DATA_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16)
#define GPEX_ENABLE_UPDATE_MASK (BIT_17|BIT_16)
#define GPEX_ENABLE_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16)
#define QLA2XX_TGT_SHT_LNK_DOWN BIT_17
if (tmp_stat_type & BIT_17) {
TRC_CMD_FREE = BIT_17,