BIT_16
cmd.req.arg[1] |= (adapter->ahw->pci_func << 8) | BIT_16;
if (!(cmd->req.arg[1] & BIT_16))
#define QLC_VF_FLOOD_BIT BIT_16
cmd.req.arg[1] |= BIT_16;
#define MBX_16 BIT_16
#define DT_ISP8031 BIT_16
#define CSRX_DMA_SHUTDOWN BIT_16 /* DMA Shutdown control status. */
#define GPDX_DATA_UPDATE_MASK (BIT_17|BIT_16)
#define GPDX_DATA_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16)
#define GPEX_ENABLE_UPDATE_MASK (BIT_17|BIT_16)
#define GPEX_ENABLE_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16)
if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {
} else if (((addr & BIT_16) == 0) &&
if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {
} else if (((addr & BIT_16) == 0) &&
#define F_CTL_SEQ_INITIATIVE BIT_16
TRC_CMD_CHK_STOP = BIT_16,