drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c

2569

cmd.req.arg[1] |= (adapter->ahw->pci_func << 8) | BIT_16;

drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c

1085

if (!(cmd->req.arg[1] & BIT_16))

drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c

16

#define QLC_VF_FLOOD_BIT BIT_16

drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c

342

cmd.req.arg[1] |= BIT_16;

drivers/scsi/qla2xxx/qla_def.h

1428

#define MBX_16 BIT_16

drivers/scsi/qla2xxx/qla_def.h

4308

#define DT_ISP8031 BIT_16

drivers/scsi/qla2xxx/qla_fw.h

1175

#define CSRX_DMA_SHUTDOWN BIT_16 /* DMA Shutdown control status. */

drivers/scsi/qla2xxx/qla_fw.h

1253

#define GPDX_DATA_UPDATE_MASK (BIT_17|BIT_16)

drivers/scsi/qla2xxx/qla_fw.h

1255

#define GPDX_DATA_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16)

drivers/scsi/qla2xxx/qla_fw.h

1269

#define GPEX_ENABLE_UPDATE_MASK (BIT_17|BIT_16)

drivers/scsi/qla2xxx/qla_fw.h

1271

#define GPEX_ENABLE_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16)

drivers/scsi/qla2xxx/qla_sup.c

2075

if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {

drivers/scsi/qla2xxx/qla_sup.c

2079

} else if (((addr & BIT_16) == 0) &&

drivers/scsi/qla2xxx/qla_sup.c

2136

if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {

drivers/scsi/qla2xxx/qla_sup.c

2140

} else if (((addr & BIT_16) == 0) &&

drivers/scsi/qla2xxx/qla_target.h

288

#define F_CTL_SEQ_INITIATIVE BIT_16

drivers/scsi/qla2xxx/qla_target.h

868

TRC_CMD_CHK_STOP = BIT_16,