BIT_10
#define QLCNIC_FW_CAPABILITY_HW_LRO BIT_10
#define QLC_83XX_1G_CAPABLE BIT_10
#define QLC_83XX_SFP_TX_FAULT(data) ((data) & BIT_10)
#define QLCNIC_ENABLE_TYPE_C_RSS BIT_10
#define TP_AUTO_REQUEST_SENSE BIT_10 /* Automatic request sense. */
#define SF_SENT_CDB BIT_10 /* Send CDB */
#define FO1_ENABLE_PURE_IOCB BIT_10
#define ADD_FO1_ENABLE_PUREX_IOCB BIT_10
#define MBX_10 BIT_10
#define PO_DIS_VALD_APP_ESC BIT_10 /* Dis validation for escape tag/ffffh */
#define SS_RESIDUAL_OVER BIT_10
#define SF_ABTS_TERMINATED BIT_10
#define RDP_PORT_SPEED_16GB BIT_10
#define FLOGI_MID_SUPPORT BIT_10
#define DT_ISP5432 BIT_10
#define FW_ATTR_H_NVME BIT_10
#define CSRX_PCIX_BUS_MODE_MASK (BIT_11|BIT_10|BIT_9|BIT_8)
#define FO1_ENABLE_PUREX BIT_10
#define TMF_CLEAR_TASK_SET BIT_10
#define LCF_INCLUDE_SNS BIT_10 /* Include SNS (FFFFFC) during LOGO. */
case BIT_10:
ha->fw_options[3] |= BIT_10;
nv->host_p = cpu_to_le32(BIT_11|BIT_10);
nv->host_p &= cpu_to_le32(~BIT_10);
le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
nv->host_p = cpu_to_le32(BIT_11|BIT_10);
le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
fw_prot_opts |= BIT_10;
if (mcp->mb[16] & BIT_10)
#define EDIF_HW_SUPPORT BIT_10
pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
nv->host_p &= cpu_to_le32(~BIT_10);
nv->host_p &= cpu_to_le32(~BIT_10);
TRC_FLUSH = BIT_10,
iscsi_opts |= BIT_10;
SET_BITVAL(sess->initial_r2t_en, options, BIT_10);