TCON_CH1_SCLK2_DIV_MASK
parent_rate /= (reg & TCON_CH1_SCLK2_DIV_MASK) + 1;
reg &= ~(TCON_CH1_SCLK2_DIV_MASK | TCON_CH1_SCLK1_HALF_BIT);
reg |= (div_m - 1) & TCON_CH1_SCLK2_DIV_MASK;