BIT27
#define LPFC_SLI4_INTR27 BIT27
!(regEAC & BIT27) && /* if Tx is OK, check whether Rx is OK */
!(regEAC & BIT27) && /* if Tx is OK, check whether Rx is OK */
PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
#define RCR_APP_BA_SSN BIT27 /* SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. */
#define IMR_GTINT3_8723B BIT27 /* When GTIMER3 expires, this bit is set to 1 */
#define IMR_BCNDMAINT7_8723B BIT27 /* Beacon DMA Interrupt 7 */