drivers/scsi/lpfc/lpfc_hw4.h

787

#define LPFC_SLI4_INTR14 BIT14

drivers/staging/rtl8723bs/hal/odm.h

379

ODM_BB_CFO_TRACKING = BIT14,

drivers/staging/rtl8723bs/hal/odm_DIG.c

665

PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1);

drivers/staging/rtl8723bs/include/hal_com_reg.h

281

#define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC = 1 MFC-->HTC = 0 */

drivers/staging/rtl8723bs/include/rtl8723b_spec.h

202

#define IMR_BCNDMAINT_E_8723B BIT14 /* Beacon DMA Interrupt Extension for Win7 */

drivers/staging/rtl8723bs/include/rtl8723b_spec.h

230

#define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrupt 1 */

drivers/tty/synclink_gt.c

353

#define MASK_BREAK BIT14

drivers/tty/synclink_gt.c

380

#define RXIDLE BIT14

drivers/tty/synclink_gt.c

381

#define RXBREAK BIT14

drivers/tty/synclink_gt.c

3886

wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14));

drivers/tty/synclink_gt.c

3894

wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14));

drivers/tty/synclink_gt.c

4121

val = BIT15 + BIT14 + BIT0;

drivers/tty/synclink_gt.c

4175

case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break;

drivers/tty/synclink_gt.c

4250

case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break;

drivers/tty/synclink_gt.c

4357

wr_reg16(info, SCR, BIT15 + BIT14 + BIT0);