drivers/scsi/lpfc/lpfc_hw4.h

786

#define LPFC_SLI4_INTR13 BIT13

drivers/staging/rtl8723bs/hal/odm.h

378

ODM_BB_ADAPTIVITY = BIT13,

drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c

388

rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1));

drivers/staging/rtl8723bs/include/hal_com_reg.h

282

#define RCR_AMF BIT13 /* Accept management type frame */

drivers/staging/rtl8723bs/include/rtl8723b_spec.h

231

#define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */

drivers/tty/synclink_gt.c

382

#define IRQ_TXDATA BIT13

drivers/tty/synclink_gt.c

4173

val |= BIT15 + BIT13;

drivers/tty/synclink_gt.c

4175

case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break;

drivers/tty/synclink_gt.c

4177

case MGSL_MODE_RAW: val |= BIT13; break;

drivers/tty/synclink_gt.c

4248

val |= BIT15 + BIT13;

drivers/tty/synclink_gt.c

4250

case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break;

drivers/tty/synclink_gt.c

4252

case MGSL_MODE_RAW: val |= BIT13; break;