TEGRA20_CLK_UARTB
{ TEGRA20_CLK_UARTB, TEGRA20_CLK_PLL_P, 0, 0 },
{ .dev_id = "tegra_uart.1", .dt_id = TEGRA20_CLK_UARTB },
TEGRA_INIT_DATA_NODIV("uartb", mux_pllpcm_clkm, CLK_SOURCE_UARTB, 30, 2, 7, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_UARTB),