drivers/net/ethernet/microchip/lan966x/lan966x_main.c

64

{ TARGET_ANA, 0x140000, 1 }, /* 0xe2140000 */

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

104

#define ANA_EMIRRORPORTS __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 64, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

113

#define ANA_FLOODING(r) __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 68, r, 8, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

134

#define ANA_FLOODING_IPMC __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 100, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

161

#define ANA_PGID(g) __REG(TARGET_ANA, 0, 1, 27648, g, 89, 8, 0, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

170

#define ANA_PGID_CFG(g) __REG(TARGET_ANA, 0, 1, 27648, g, 89, 8, 4, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

179

#define ANA_MACHDATA __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 40, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

182

#define ANA_MACLDATA __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 44, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

185

#define ANA_MACACCESS __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 48, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

224

#define ANA_MACTINDX __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 52, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

239

#define ANA_VLAN_PORT_MASK __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 56, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

248

#define ANA_VLANACCESS __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 60, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

257

#define ANA_VLANTIDX __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 64, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

272

#define ANA_VLAN_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 0, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

305

#define ANA_DROP_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 4, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

332

#define ANA_QOS_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 8, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

365

#define ANA_VCAP_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 12, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

374

#define ANA_VCAP_S1_CFG(g, r) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 16, r, 3, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

401

#define ANA_VCAP_S2_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 28, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

464

#define ANA_PCP_DEI_CFG(g, r) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 32, r, 16, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

479

#define ANA_CPU_FWD_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 96, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

506

#define ANA_CPU_FWD_BPDU_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 100, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

509

#define ANA_PORT_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 112, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

542

#define ANA_DSCP_REWR_CFG(r) __REG(TARGET_ANA, 0, 1, 31232, 0, 1, 552, 332, r, 16, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

551

#define ANA_POL_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 116, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

566

#define ANA_PFC_CFG(g) __REG(TARGET_ANA, 0, 1, 30720, g, 8, 64, 0, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

575

#define ANA_AGGR_CFG __REG(TARGET_ANA, 0, 1, 31232, 0, 1, 552, 0, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

59

#define ANA_ADVLEARN __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 0, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

620

#define ANA_DSCP_CFG(r) __REG(TARGET_ANA, 0, 1, 31232, 0, 1, 552, 76, r, 64, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

647

#define ANA_POL_PIR_CFG(g) __REG(TARGET_ANA, 0, 1, 16384, g, 345, 32, 0, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

662

#define ANA_POL_MODE(g) __REG(TARGET_ANA, 0, 1, 16384, g, 345, 32, 8, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

68

#define ANA_VLANMASK __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 8, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

695

#define ANA_POL_PIR_STATE(g) __REG(TARGET_ANA, 0, 1, 16384, g, 345, 32, 12, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

71

#define ANA_ANAINTR __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 16, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

86

#define ANA_AUTOAGE __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 44, 0, 1, 4)

drivers/net/ethernet/microchip/lan966x/lan966x_regs.h

95

#define ANA_MIRRORPORTS __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 60, 0, 1, 4)