arch/arm64/kvm/at.c

1368

write_sysreg_el1(vcpu_read_sys_reg(vcpu, TCR_EL1), SYS_TCR);

arch/arm64/kvm/at.c

159

tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

140

ctxt_sys_reg(ctxt, TCR_EL1) = read_sysreg_el1(SYS_TCR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

220

write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

227

write_sysreg_el1((ctxt_sys_reg(ctxt, TCR_EL1) |

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

279

write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR);

arch/arm64/kvm/hyp/nvhe/switch.c

73

write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR);

arch/arm64/kvm/inject_fault.c

205

if (vcpu_read_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE) {

arch/arm64/kvm/inject_fault.c

311

!(vcpu_read_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE))

arch/arm64/kvm/nested.c

870

tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);

arch/arm64/kvm/sys_regs.c

107

case TCR_EL1:

arch/arm64/kvm/sys_regs.c

191

MAPPED_EL2_SYSREG(TCR_EL2, TCR_EL1,

arch/arm64/kvm/sys_regs.c

227

case TCR_EL1: val = read_sysreg_s(SYS_TCR_EL12); break;

arch/arm64/kvm/sys_regs.c

265

case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break;

arch/arm64/kvm/sys_regs.c

3300

{ SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },

arch/arm64/kvm/sys_regs.c

4454

{ AA32(LO), Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, TCR_EL1 },

arch/arm64/kvm/sys_regs.c

4456

{ AA32(HI), Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, TCR_EL1 },

tools/testing/selftests/kvm/include/arm64/processor.h

345

MAPPED_EL2_SYSREG(TCR_EL2, TCR_EL1);