Symbol: BI
arch/powerpc/xmon/ppc-opc.c
4038
{"bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4039
{"bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4040
{"bdnzf", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4041
{"bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4042
{"bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4043
{"bdnzfl", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4044
{"bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4045
{"bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4046
{"bdnzfa", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4047
{"bdnzfla-", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4048
{"bdnzfla+", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4049
{"bdnzfla", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4050
{"bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4051
{"bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4052
{"bdzf", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4053
{"bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4054
{"bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4055
{"bdzfl", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4056
{"bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4057
{"bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4058
{"bdzfa", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4059
{"bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4060
{"bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4061
{"bdzfla", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4063
{"bf-", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4064
{"bf+", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4065
{"bf", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4066
{"bbf", BBO(16,BOF,0,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4067
{"bfl-", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4068
{"bfl+", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4069
{"bfl", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4070
{"bbfl", BBO(16,BOF,0,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4071
{"bfa-", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4072
{"bfa+", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4073
{"bfa", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4074
{"bbfa", BBO(16,BOF,1,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4075
{"bfla-", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4076
{"bfla+", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4077
{"bfla", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4078
{"bbfla", BBO(16,BOF,1,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4080
{"bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4081
{"bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4082
{"bdnzt", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4083
{"bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4084
{"bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4085
{"bdnztl", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4086
{"bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4087
{"bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4088
{"bdnzta", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4089
{"bdnztla-", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4090
{"bdnztla+", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4091
{"bdnztla", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4092
{"bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4093
{"bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4094
{"bdzt", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4095
{"bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4096
{"bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4097
{"bdztl", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4098
{"bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4099
{"bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4100
{"bdzta", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4101
{"bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4102
{"bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4103
{"bdztla", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4105
{"bt-", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4106
{"bt+", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4107
{"bt", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4108
{"bbt", BBO(16,BOT,0,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4109
{"btl-", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4110
{"btl+", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4111
{"btl", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4112
{"bbtl", BBO(16,BOT,0,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4113
{"bta-", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4114
{"bta+", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4115
{"bta", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4116
{"bbta", BBO(16,BOT,1,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4117
{"btla-", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4118
{"btla+", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4119
{"btla", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4120
{"bbtla", BBO(16,BOT,1,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4122
{"bc-", B(16,0,0), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4123
{"bc+", B(16,0,0), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4124
{"bc", B(16,0,0), B_MASK, COM, PPCVLE, {BO, BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4125
{"bcl-", B(16,0,1), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDM}},
arch/powerpc/xmon/ppc-opc.c
4126
{"bcl+", B(16,0,1), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDP}},
arch/powerpc/xmon/ppc-opc.c
4127
{"bcl", B(16,0,1), B_MASK, COM, PPCVLE, {BO, BI, BD}},
arch/powerpc/xmon/ppc-opc.c
4128
{"bca-", B(16,1,0), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4129
{"bca+", B(16,1,0), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4130
{"bca", B(16,1,0), B_MASK, COM, PPCVLE, {BO, BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4131
{"bcla-", B(16,1,1), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDMA}},
arch/powerpc/xmon/ppc-opc.c
4132
{"bcla+", B(16,1,1), B_MASK, PPCCOM, PPCVLE, {BOE, BI, BDPA}},
arch/powerpc/xmon/ppc-opc.c
4133
{"bcla", B(16,1,1), B_MASK, COM, PPCVLE, {BO, BI, BDA}},
arch/powerpc/xmon/ppc-opc.c
4317
{"bdnzflr", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4318
{"bdnzflr-", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4319
{"bdnzflrl", XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4320
{"bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4321
{"bdnzflr+", XLO(19,BODNZFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4322
{"bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4323
{"bdzflr", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4324
{"bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4325
{"bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4326
{"bdzflrl-", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4327
{"bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4328
{"bdzflrl+", XLO(19,BODZFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4329
{"bflr", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4330
{"bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4331
{"bbfr", XLO(19,BOF,16,0), XLBOBB_MASK, PWRCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4332
{"bflrl", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4333
{"bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4334
{"bbfrl", XLO(19,BOF,16,1), XLBOBB_MASK, PWRCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4335
{"bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4336
{"bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4337
{"bflr-", XLO(19,BOFM4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4338
{"bflrl-", XLO(19,BOFM4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4339
{"bflr+", XLO(19,BOFP4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4340
{"bflrl+", XLO(19,BOFP4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4341
{"bdnztlr", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4342
{"bdnztlr-", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4343
{"bdnztlrl", XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4344
{"bdnztlrl-", XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4345
{"bdnztlr+", XLO(19,BODNZTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4346
{"bdnztlrl+", XLO(19,BODNZTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4347
{"bdztlr", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4348
{"bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4349
{"bdztlrl", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4350
{"bdztlrl-", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4351
{"bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4352
{"bdztlrl+", XLO(19,BODZTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4353
{"btlr", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4354
{"btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4355
{"bbtr", XLO(19,BOT,16,0), XLBOBB_MASK, PWRCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4356
{"btlrl", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4357
{"btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4358
{"bbtrl", XLO(19,BOT,16,1), XLBOBB_MASK, PWRCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4359
{"btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4360
{"btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4361
{"btlr-", XLO(19,BOTM4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4362
{"btlrl-", XLO(19,BOTM4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4363
{"btlr+", XLO(19,BOTP4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4364
{"btlrl+", XLO(19,BOTP4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4366
{"bclr-", XLYLK(19,16,0,0), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4367
{"bclrl-", XLYLK(19,16,0,1), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4368
{"bclr+", XLYLK(19,16,1,0), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4369
{"bclrl+", XLYLK(19,16,1,1), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4370
{"bclr", XLLK(19,16,0), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},
arch/powerpc/xmon/ppc-opc.c
4371
{"bcr", XLLK(19,16,0), XLBB_MASK, PWRCOM, PPCVLE, {BO, BI}},
arch/powerpc/xmon/ppc-opc.c
4372
{"bclrl", XLLK(19,16,1), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},
arch/powerpc/xmon/ppc-opc.c
4373
{"bcrl", XLLK(19,16,1), XLBB_MASK, PWRCOM, PPCVLE, {BO, BI}},
arch/powerpc/xmon/ppc-opc.c
4549
{"bfctr", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4550
{"bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4551
{"bfctrl", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4552
{"bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4553
{"bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4554
{"bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4555
{"bfctr-", XLO(19,BOFM4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4556
{"bfctrl-", XLO(19,BOFM4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4557
{"bfctr+", XLO(19,BOFP4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4558
{"bfctrl+", XLO(19,BOFP4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4559
{"btctr", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4560
{"btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4561
{"btctrl", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4562
{"btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4563
{"btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4564
{"btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4565
{"btctr-", XLO(19,BOTM4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4566
{"btctrl-", XLO(19,BOTM4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4567
{"btctr+", XLO(19,BOTP4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4568
{"btctrl+", XLO(19,BOTP4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI}},
arch/powerpc/xmon/ppc-opc.c
4570
{"bcctr-", XLYLK(19,528,0,0), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4571
{"bcctrl-", XLYLK(19,528,0,1), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4572
{"bcctr+", XLYLK(19,528,1,0), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4573
{"bcctrl+", XLYLK(19,528,1,1), XLYBB_MASK, PPCCOM, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4574
{"bcctr", XLLK(19,528,0), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},
arch/powerpc/xmon/ppc-opc.c
4575
{"bcc", XLLK(19,528,0), XLBB_MASK, PWRCOM, PPCVLE, {BO, BI}},
arch/powerpc/xmon/ppc-opc.c
4576
{"bcctrl", XLLK(19,528,1), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},
arch/powerpc/xmon/ppc-opc.c
4577
{"bccl", XLLK(19,528,1), XLBB_MASK, PWRCOM, PPCVLE, {BO, BI}},
arch/powerpc/xmon/ppc-opc.c
4579
{"bctar-", XLYLK(19,560,0,0), XLYBB_MASK, POWER8, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4580
{"bctarl-", XLYLK(19,560,0,1), XLYBB_MASK, POWER8, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4581
{"bctar+", XLYLK(19,560,1,0), XLYBB_MASK, POWER8, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4582
{"bctarl+", XLYLK(19,560,1,1), XLYBB_MASK, POWER8, PPCVLE, {BOE, BI}},
arch/powerpc/xmon/ppc-opc.c
4583
{"bctar", XLLK(19,560,0), XLBH_MASK, POWER8, PPCVLE, {BO, BI, BH}},
arch/powerpc/xmon/ppc-opc.c
4584
{"bctarl", XLLK(19,560,1), XLBH_MASK, POWER8, PPCVLE, {BO, BI, BH}},
arch/x86/events/intel/p4.c
83
P4_ESCR_EMASK_BIT(P4_EVENT_TC_DELIVER_MODE, BI) |
drivers/video/fbdev/imsttfb.c
1013
write_reg_le32(par->dc_regs, BI, 0xffffffff);