drivers/phy/microchip/sparx5_serdes.c

1070

cmu_cfg_tgt = sdx5_inst_get(priv, TARGET_SD_CMU_CFG, cmu_idx);

drivers/phy/microchip/sparx5_serdes.c

1134

cmu_cfg_inst = sdx5_inst_get(priv, TARGET_SD_CMU_CFG, i);

drivers/phy/microchip/sparx5_serdes.c

2472

{ TARGET_SD_CMU_CFG, 0x48000 }, /* 0x610850000: sd_cmu_cfg_0 */

drivers/phy/microchip/sparx5_serdes.c

2473

{ TARGET_SD_CMU_CFG + 1, 0x50000 }, /* 0x610858000: sd_cmu_cfg_1 */

drivers/phy/microchip/sparx5_serdes.c

2474

{ TARGET_SD_CMU_CFG + 2, 0x58000 }, /* 0x610860000: sd_cmu_cfg_2 */

drivers/phy/microchip/sparx5_serdes.c

2475

{ TARGET_SD_CMU_CFG + 3, 0x60000 }, /* 0x610868000: sd_cmu_cfg_3 */

drivers/phy/microchip/sparx5_serdes.c

2476

{ TARGET_SD_CMU_CFG + 4, 0x68000 }, /* 0x610870000: sd_cmu_cfg_4 */

drivers/phy/microchip/sparx5_serdes.c

2477

{ TARGET_SD_CMU_CFG + 5, 0x70000 }, /* 0x610878000: sd_cmu_cfg_5 */

drivers/phy/microchip/sparx5_serdes.c

2478

{ TARGET_SD_CMU_CFG + 6, 0x78000 }, /* 0x610880000: sd_cmu_cfg_6 */

drivers/phy/microchip/sparx5_serdes.c

2479

{ TARGET_SD_CMU_CFG + 7, 0x80000 }, /* 0x610888000: sd_cmu_cfg_7 */

drivers/phy/microchip/sparx5_serdes.c

2480

{ TARGET_SD_CMU_CFG + 8, 0x88000 }, /* 0x610890000: sd_cmu_cfg_8 */

drivers/phy/microchip/sparx5_serdes.c

2520

{ TARGET_SD_CMU_CFG + 9, 0x428000 }, /* 0x610c30000: sd_cmu_cfg_9 */

drivers/phy/microchip/sparx5_serdes.c

2521

{ TARGET_SD_CMU_CFG + 10, 0x430000 }, /* 0x610c38000: sd_cmu_cfg_10 */

drivers/phy/microchip/sparx5_serdes.c

2522

{ TARGET_SD_CMU_CFG + 11, 0x438000 }, /* 0x610c40000: sd_cmu_cfg_11 */

drivers/phy/microchip/sparx5_serdes.c

2523

{ TARGET_SD_CMU_CFG + 12, 0x440000 }, /* 0x610c48000: sd_cmu_cfg_12 */

drivers/phy/microchip/sparx5_serdes.c

2524

{ TARGET_SD_CMU_CFG + 13, 0x448000 }, /* 0x610c50000: sd_cmu_cfg_13 */

drivers/phy/microchip/sparx5_serdes.c

2566

{ TARGET_SD_CMU_CFG, 0x30000 }, /* 0xe3440000 */

drivers/phy/microchip/sparx5_serdes.c

2567

{ TARGET_SD_CMU_CFG + 1, 0x38000 }, /* 0xe3448000 */

drivers/phy/microchip/sparx5_serdes.c

2568

{ TARGET_SD_CMU_CFG + 2, 0x40000 }, /* 0xe3450000 */

drivers/phy/microchip/sparx5_serdes.c

2569

{ TARGET_SD_CMU_CFG + 3, 0x48000 }, /* 0xe3458000 */

drivers/phy/microchip/sparx5_serdes.c

2570

{ TARGET_SD_CMU_CFG + 4, 0x50000 }, /* 0xe3460000 */

drivers/phy/microchip/sparx5_serdes.c

2571

{ TARGET_SD_CMU_CFG + 5, 0x58000 }, /* 0xe3468000 */

drivers/phy/microchip/sparx5_serdes.c

951

cmu_cfg_tgt = sdx5_inst_get(priv, TARGET_SD_CMU_CFG, cmu_idx);

drivers/phy/microchip/sparx5_serdes_regs.h

2653

__REG(TARGET_SD_CMU_CFG, t, TSIZE(TC_SD_CMU_CFG), 0, 0, 1, 8, 0, 0, 1, \