TARGET_REW
{ TARGET_REW, 0x14000, 1 }, /* 0xe2014000 */
#define REW_PORT_VLAN_CFG(g) __REG(TARGET_REW, 0, 1, 0, g, 10, 128, 0, 0, 1, 4)
#define REW_TAG_CFG(g) __REG(TARGET_REW, 0, 1, 0, g, 10, 128, 4, 0, 1, 4)
#define REW_PORT_CFG(g) __REG(TARGET_REW, 0, 1, 0, g, 10, 128, 8, 0, 1, 4)
#define REW_DSCP_CFG(g) __REG(TARGET_REW, 0, 1, 0, g, 10, 128, 12, 0, 1, 4)
#define REW_PCP_DEI_CFG(g, r) __REG(TARGET_REW, 0, 1, 0, g, 10, 128, 16, r, 16, 4)
#define REW_STAT_CFG __REG(TARGET_REW, 0, 1, 3072, 0, 1, 528, 520, 0, 1, 4)
{ TARGET_REW, 0x2600000, 1 }, /* 0xe2600000 */
{ TARGET_REW, 0x11600000, 2 }, /* 0x611600000 */
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_COMMON], 0, 1, 1232, 0, r, \
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_COMMON], 0, 1, 1232, 560, r,\
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_COMMON], 0, 1, 1232, 852, 0,\
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_PORT], g, \
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_PORT], g, \
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_PORT], g, \
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_PORT], g, \
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_PORT], g, \
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_PORT], g, \
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_PORT], g, \
__REG(TARGET_REW, 0, 1, 378368, 0, 1, 40, 0, 0, 1, 4)
__REG(TARGET_REW, 0, 1, 378368, 0, 1, 40, 4, 0, 1, 4)
__REG(TARGET_REW, 0, 1, 378368, 0, 1, 40, 8, 0, 1, 4)
__REG(TARGET_REW, 0, 1, 378368, 0, 1, 40, 12, 0, 1, 4)
__REG(TARGET_REW, 0, 1, 378368, 0, 1, 40, 16, 0, 1, 4)
__REG(TARGET_REW, 0, 1, 378368, 0, 1, 40, 20, 0, 1, 4)
__REG(TARGET_REW, 0, 1, 378368, 0, 1, 40, 24, r, 4, 4)
__REG(TARGET_REW, 0, 1, regs->gaddr[GA_REW_RAM_CTRL], 0, 1, 4, 0, 0, 1,\