arch/arm64/include/asm/arch_gicv3.h

114

return read_sysreg_s(SYS_ICC_SRE_EL1);

arch/arm64/include/asm/arch_gicv3.h

119

write_sysreg_s(val, SYS_ICC_SRE_EL1);

arch/arm64/kvm/hyp/nvhe/sys_regs.c

488

{ SYS_DESC(SYS_ICC_SRE_EL1), .access = pvm_gic_read_sre, },

arch/arm64/kvm/sys_regs.c

3404

{ SYS_DESC(SYS_ICC_SRE_EL1), access_gic_sre },

arch/arm64/kvm/sys_regs.c

4527

{ CP15_SYS_DESC(SYS_ICC_SRE_EL1), access_gic_sre },

arch/arm64/kvm/vgic-sys-reg-v3.c

410

{ SYS_DESC(SYS_ICC_SRE_EL1),

tools/testing/selftests/kvm/arm64/vgic_init.c

788

SR(SYS_ICC_SRE_EL1),

tools/testing/selftests/kvm/lib/arm64/gic_v3.c

344

write_sysreg_s(read_sysreg_s(SYS_ICC_SRE_EL1) | ICC_SRE_EL1_SRE,

tools/testing/selftests/kvm/lib/arm64/gic_v3.c

345

SYS_ICC_SRE_EL1);