drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h

111

.name = "sspp_6", .id = SSPP_RGB2,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

211

case SSPP_RGB2:

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

495

[SSPP_RGB2] = { { 0, 15, 12 }, { -1 } },

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c

207

status->sspp[SSPP_RGB2] = (value >> 16) & 0x1;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c

95

status->sspp[SSPP_RGB2] = (value >> 16) & 0x3;

drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c

111

[SSPP_RGB0] = 16, [SSPP_RGB1] = 17, [SSPP_RGB2] = 18,

drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c

201

[SSPP_RGB2] = 18, [SSPP_RGB3] = 22,

drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c

453

[SSPP_RGB2] = 18, [SSPP_RGB3] = 22,

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

286

case SSPP_RGB2: return MDP5_CTL_LAYER_REG_RGB2(stage);

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

309

case SSPP_RGB2: return MDP5_CTL_LAYER_EXT_REG_RGB2_BIT3;

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

437

case SSPP_RGB2: return MDP5_CTL_FLUSH_RGB2;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

607

SSPP_RGB0, SSPP_RGB1, SSPP_RGB2, SSPP_RGB3,

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h

214

case SSPP_RGB2: