drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

238

case SSPP_CURSOR1:

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c

504

[SSPP_CURSOR1] = { { 1, 26 }, { -1 } },

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c

102

status->sspp[SSPP_CURSOR1] = (value >> 26) & 0x3;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c

214

status->sspp[SSPP_CURSOR1] = (value >> 26) & 0x1;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

1529

pipe->sspp->idx != SSPP_CURSOR1)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

278

pipe->sspp->idx != SSPP_CURSOR1 &&

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

292

case SSPP_CURSOR1:

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

300

if (stage < STAGE6 && (pipe != SSPP_CURSOR0 && pipe != SSPP_CURSOR1))

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

315

case SSPP_CURSOR1: return MDP5_CTL_LAYER_EXT_REG_CURSOR1(stage);

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c

443

case SSPP_CURSOR1: return MDP5_CTL_FLUSH_CURSOR_1;

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c

616

SSPP_CURSOR0, SSPP_CURSOR1,

drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.h

11

#define SSPP_MAX (SSPP_CURSOR1 + 1)