STM32_DMA3_CCR
ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & CCR_ALLIE;
ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id));
offset = STM32_DMA3_CCR(id);
writel_relaxed(chan->swdesc->ccr, ddata->base + STM32_DMA3_CCR(id));
ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(id));
writel_relaxed(ccr | CCR_EN, ddata->base + STM32_DMA3_CCR(id));
u32 csr, ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & ~CCR_EN;
writel_relaxed(ccr, ddata->base + STM32_DMA3_CCR(chan->id));
u32 ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & ~CCR_EN;
writel_relaxed(ccr |= CCR_RESET, ddata->base + STM32_DMA3_CCR(chan->id));
writel_relaxed(swdesc->ccr | CCR_SUSP, ddata->base + STM32_DMA3_CCR(chan->id));
writel_relaxed(swdesc->ccr, ddata->base + STM32_DMA3_CCR(chan->id));
writel_relaxed(swdesc->ccr, ddata->base + STM32_DMA3_CCR(chan->id));
ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id));
writel_relaxed(ccr & ~(CCR_ALLIE | CCR_EN), ddata->base + STM32_DMA3_CCR(chan->id));