STM32H7_ADC_CR
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_DEEPPWD);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS);
if (!(stm32_adc_readl(adc, STM32H7_ADC_CR) & STM32H7_ADEN))
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS);
ret = stm32_adc_readl_poll_timeout(STM32H7_ADC_CR, val,
stm32_adc_clr_bits(adc, STM32H7_ADC_CR, lincalrdyw_mask);
ret = stm32_adc_readl_poll_timeout(STM32H7_ADC_CR, val,
stm32_adc_set_bits(adc, STM32H7_ADC_CR, lincalrdyw_mask);
ret = stm32_adc_readl_poll_timeout(STM32H7_ADC_CR, val,
stm32_adc_clr_bits(adc, STM32H7_ADC_CR, lincalrdyw_mask);
ret = stm32_adc_readl_poll_timeout(STM32H7_ADC_CR, val,
stm32_adc_clr_bits(adc, STM32H7_ADC_CR, msk);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADCAL);
ret = stm32_adc_readl_poll_timeout(STM32H7_ADC_CR, val,
stm32_adc_set_bits(adc, STM32H7_ADC_CR, msk);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADCAL);
ret = stm32_adc_readl_poll_timeout(STM32H7_ADC_CR, val,
stm32_adc_clr_bits(adc, STM32H7_ADC_CR, msk);
val = stm32_adc_readl(adc, STM32H7_ADC_CR) & STM32H7_LINCALRDYW_MASK;
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADSTART);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADSTP);
ret = stm32_adc_readl_poll_timeout(STM32H7_ADC_CR, val,
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADSTART);
stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_DEEPPWD);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADVREGEN);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_BOOST);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_DEEPPWD);
stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_BOOST);