arch/sh/kernel/cpu/sh2a/clock-sh7269.c

125

[MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

126

[MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

127

[MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

128

[MSTP44] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 4, 0), /* SCIF3 */

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

129

[MSTP43] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 3, 0), /* SCIF4 */

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

130

[MSTP42] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 2, 0), /* SCIF5 */

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

131

[MSTP41] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 1, 0), /* SCIF6 */

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

132

[MSTP40] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 0, 0), /* SCIF7 */

arch/sh/kernel/cpu/sh2a/setup-sh7203.c

348

__raw_writeb(__raw_readb(STBCR4) & ~0x04, STBCR4);

arch/sh/kernel/cpu/sh2a/setup-sh7206.c

284

__raw_writeb(__raw_readb(STBCR4) & ~0x04, STBCR4);