BE
val = v << ((BE) ? 8 : 0); \
val |= v << ((BE) ? 0 : 8); \
val = v << ((BE) ? 24 : 0); \
val |= v << ((BE) ? 16 : 8); \
val |= v << ((BE) ? 8 : 16); \
val |= v << ((BE) ? 0 : 24); \
val = v << ((BE) ? 8 : 0); \
val |= v << ((BE) ? 0 : 8); \
val = v << ((BE) ? 24 : 0); \
val |= v << ((BE) ? 16 : 8); \
val |= v << ((BE) ? 8 : 16); \
val |= v << ((BE) ? 0 : 24); \
#define __HEAD_FLAGS (__HEAD_FLAG(BE) | \
#define __HEAD_FLAGS (__HEAD_FLAG(BE))
emit_branch(BE, t_offset + 20);
emit_branch_off(BE, 12);
COND_SEL(BPF_JMP | BPF_JEQ | BPF_K, BE, BNE);
COND_SEL(BPF_JMP | BPF_JSET | BPF_K, BNE, BE);
COND_SEL(BPF_JMP | BPF_JEQ | BPF_X, BE, BNE);
COND_SEL(BPF_JMP | BPF_JSET | BPF_X, BNE, BE);
#define BE_PTR BE
br_opcode = BE;
emit_branch(BE, ctx->idx, ctx->idx + OFFSET3, ctx);
#define SET_BE(b, c, v) SET_CONTEXT_FIELD(b, c, SCTLR, BE, v)
#define GET_BE(b, c) GET_CONTEXT_FIELD(b, c, SCTLR, BE)
bert.BE = 0;
u8 BE :1;
u8 BE :1; /* baud clock pin */
[IEEE80211_AC_BE] = R_MUEDCA_ACS_PARAM(BE),
DEF_TXCHADDRS_TYPE2(BE, ACH0, CH0, _V1),
DEF_TXCHADDRS_TYPE2(BE, ACH1, CH1, _V1),
DEF_TXCHADDRS_TYPE2(BE, ACH2, CH2, _V1),
DEF_TXCHADDRS_TYPE2(BE, ACH3, CH3, _V1),
DEF_TXCHADDRS_TYPE2(BE, ACH4, CH4, _V1),
DEF_TXCHADDRS_TYPE2(BE, ACH5, CH5, _V1),
DEF_TXCHADDRS_TYPE2(BE, ACH6, CH6, _V1),
DEF_TXCHADDRS_TYPE2(BE, ACH7, CH7, _V1),
DEF_TXCHADDRS_TYPE2(BE, CH8, CH8, _V1),
DEF_TXCHADDRS_TYPE2(BE, CH9, CH9, _V1),
DEF_TXCHADDRS_TYPE2(BE, CH10, CH10, _V1),
DEF_TXCHADDRS_TYPE2(BE, CH11, CH11, _V1),
DEF_TXCHADDRS_TYPE2(BE, CH12, CH12, _V1),
DEF_RXCHADDRS(BE, RXQ, RXQ0, _V1),
DEF_RXCHADDRS(BE, RPQ, RPQ0, _V1),
DEF_TXCHADDRS_TYPE3_GRP_BASE(BE, ACH0, CH0, ACQ, _V1),
DEF_TXCHADDRS_TYPE3(BE, ACH2, CH2, _V1),
DEF_TXCHADDRS_TYPE3(BE, ACH4, CH4, _V1),
DEF_TXCHADDRS_TYPE3(BE, ACH6, CH6, _V1),
DEF_TXCHADDRS_TYPE3_GRP_BASE(BE, CH8, CH8, NACQ, _V1),
DEF_TXCHADDRS_TYPE3(BE, CH10, CH10, _V1),
DEF_TXCHADDRS_TYPE3(BE, CH12, CH12, _V1),
DEF_RXCHADDRS_TYPE3_GRP_BASE(BE, RXQ, CH0, HOST0, _V1),
DEF_RXCHADDRS_TYPE3(BE, RPQ, CH1, _V1),
(SNDRV_PCM_FMTBIT_##name##LE | SNDRV_PCM_FMTBIT_##name##BE)