SSDR
spinand->bus_iface = SSDR;
if ((iface == SSDR && spinand_op_is_odtr(op)) ||
if ((iface == SSDR && spinand_op_is_odtr(&op)) ||
op = spinand_select_op_variant(spinand, SSDR,
op = spinand_select_op_variant(spinand, SSDR,
op = spinand_select_op_variant(spinand, SSDR,
ret = spinand_support_vendor_ops(spinand, info, SSDR);
ret = spinand->configure_chip(spinand, SSDR);
ret = spinand->configure_chip(spinand, SSDR);
spinand->bus_iface = SSDR;
WARN_ON_ONCE(spinand->bus_iface != SSDR);
return (spinand->bus_iface == SSDR) ?
WARN_ON_ONCE(spinand->bus_iface != SSDR);
if (iface != SSDR)
case SSDR:
cfg.src_addr = drv_data->ssp->phys_base + SSDR;
cfg.dst_addr = drv_data->ssp->phys_base + SSDR;
pxa2xx_spi_read(drv_data, SSDR);
pxa2xx_spi_write(drv_data, SSDR, 0);
pxa2xx_spi_read(drv_data, SSDR);
pxa2xx_spi_write(drv_data, SSDR, *(u8 *)(drv_data->tx));
*(u8 *)(drv_data->rx) = pxa2xx_spi_read(drv_data, SSDR);
pxa2xx_spi_write(drv_data, SSDR, *(u16 *)(drv_data->tx));
*(u16 *)(drv_data->rx) = pxa2xx_spi_read(drv_data, SSDR);
pxa2xx_spi_write(drv_data, SSDR, *(u32 *)(drv_data->tx));
*(u32 *)(drv_data->rx) = pxa2xx_spi_read(drv_data, SSDR);
catpt_writel_ssp(cdev, i, SSDR, CATPT_SSD_DEFAULT);
dma->addr = ssp->phys_base + SSDR;