arch/riscv/include/asm/csr.h

532

# define SR_PP SR_SPP

arch/riscv/kvm/vcpu.c

226

return (vcpu->arch.guest_context.sstatus & SR_SPP) ? true : false;

arch/riscv/kvm/vcpu.c

72

cntx->sstatus = SR_SPP | SR_SPIE;

arch/riscv/kvm/vcpu_exit.c

145

vsstatus &= ~SR_SPP;

arch/riscv/kvm/vcpu_exit.c

146

if (vcpu->arch.guest_context.sstatus & SR_SPP)

arch/riscv/kvm/vcpu_exit.c

147

vsstatus |= SR_SPP;

arch/riscv/kvm/vcpu_exit.c

169

vcpu->arch.guest_context.sstatus |= SR_SPP;

arch/riscv/kvm/vcpu_insn.c

86

kvm_vcpu_on_spin(vcpu, vcpu->arch.guest_context.sstatus & SR_SPP);

arch/riscv/kvm/vcpu_onereg.c

464

reg_val = (cntx->sstatus & SR_SPP) ?

arch/riscv/kvm/vcpu_onereg.c

504

cntx->sstatus |= SR_SPP;

arch/riscv/kvm/vcpu_onereg.c

506

cntx->sstatus &= ~SR_SPP;

arch/riscv/kvm/vcpu_sbi_system.c

27

if (!(cp->sstatus & SR_SPP)) {

tools/arch/riscv/include/asm/csr.h

457

# define SR_PP SR_SPP