SR_INT
out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */
if (in_8(&via[IFR]) & SR_INT)
out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */
out_8(&via[IFR], SR_INT);
WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (2)");
out_8(&via[IFR], SR_INT);
WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (4)");
out_8(&via[IFR], SR_INT);
if ((in_8(&via[IFR]) & SR_INT) == 0) {
out_8(&via[IFR], SR_INT);
if (via[IFR] & SR_INT)
via[IFR] = SR_INT;
intr = in_8(&via1[IFR]) & (SR_INT | CB1_INT);
intr = SR_INT;
if (intr & SR_INT) {
out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);