SPICC_CONREG
spicc->base + SPICC_CONREG);
writel(0, spicc->base + SPICC_CONREG);
spicc->base + SPICC_CONREG);
writel_bits_relaxed(SPICC_SMC, 0, spicc->base + SPICC_CONREG);
spicc->base + SPICC_CONREG);
writel_bits_relaxed(SPICC_XCH, SPICC_XCH, spicc->base + SPICC_CONREG);
readl_relaxed(spicc->base + SPICC_CONREG));
conf = conf_orig = readl_relaxed(spicc->base + SPICC_CONREG);
writel_relaxed(conf, spicc->base + SPICC_CONREG);
writel_bits_relaxed(SPICC_SMC, SPICC_SMC, spicc->base + SPICC_CONREG);
writel_bits_relaxed(SPICC_XCH, SPICC_XCH, spicc->base + SPICC_CONREG);
u32 conf = readl_relaxed(spicc->base + SPICC_CONREG) & SPICC_DATARATE_MASK;
writel_relaxed(conf, spicc->base + SPICC_CONREG);
u32 conf = readl_relaxed(spicc->base + SPICC_CONREG) & SPICC_DATARATE_MASK;
writel_relaxed(conf, spicc->base + SPICC_CONREG);
spicc->pow2_div.reg = spicc->base + SPICC_CONREG;