drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

100

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

101

SRII(PIXEL_RATE_CNTL, OTG, 3)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

105

SRII(PHASE, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

106

SRII(PHASE, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

107

SRII(PHASE, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

108

SRII(PHASE, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

109

SRII(MODULO, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

110

SRII(MODULO, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

111

SRII(MODULO, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

112

SRII(MODULO, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

113

SRII(PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

114

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

115

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

116

SRII(PIXEL_RATE_CNTL, OTG, 3)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

120

SRII(PHASE, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

121

SRII(PHASE, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

122

SRII(PHASE, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

123

SRII(PHASE, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

124

SRII(MODULO, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

125

SRII(MODULO, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

126

SRII(MODULO, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

127

SRII(MODULO, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

128

SRII(PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

129

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

130

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

131

SRII(PIXEL_RATE_CNTL, OTG, 3)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

135

SRII(PHASE, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

136

SRII(PHASE, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

137

SRII(PHASE, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

138

SRII(PHASE, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

139

SRII(PHASE, DP_DTO, 4),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

140

SRII(MODULO, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

141

SRII(MODULO, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

142

SRII(MODULO, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

143

SRII(MODULO, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

144

SRII(MODULO, DP_DTO, 4),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

145

SRII(PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

146

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

147

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

148

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

149

SRII(PIXEL_RATE_CNTL, OTG, 4)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

153

SRII(PHASE, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

154

SRII(PHASE, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

155

SRII(MODULO, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

156

SRII(MODULO, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

157

SRII(PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

158

SRII(PIXEL_RATE_CNTL, OTG, 1)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

176

SRII(PHASE, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

177

SRII(PHASE, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

178

SRII(PHASE, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

179

SRII(PHASE, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

180

SRII(MODULO, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

181

SRII(MODULO, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

182

SRII(MODULO, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

183

SRII(MODULO, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

184

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

185

SRII(PIXEL_RATE_CNTL, OTG, 1), \

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

186

SRII(PIXEL_RATE_CNTL, OTG, 2), \

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

187

SRII(PIXEL_RATE_CNTL, OTG, 3)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

60

SRII(PHASE, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

61

SRII(PHASE, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

62

SRII(PHASE, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

63

SRII(PHASE, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

64

SRII(PHASE, DP_DTO, 4),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

65

SRII(PHASE, DP_DTO, 5),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

66

SRII(MODULO, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

67

SRII(MODULO, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

68

SRII(MODULO, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

69

SRII(MODULO, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

70

SRII(MODULO, DP_DTO, 4),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

71

SRII(MODULO, DP_DTO, 5),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

72

SRII(PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

73

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

74

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

75

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

76

SRII(PIXEL_RATE_CNTL, OTG, 4),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

77

SRII(PIXEL_RATE_CNTL, OTG, 5)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

81

SRII(PHASE, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

82

SRII(PHASE, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

83

SRII(MODULO, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

84

SRII(MODULO, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

85

SRII(PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

86

SRII(PIXEL_RATE_CNTL, OTG, 1)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

90

SRII(PHASE, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

91

SRII(PHASE, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

92

SRII(PHASE, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

93

SRII(PHASE, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

94

SRII(MODULO, DP_DTO, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

95

SRII(MODULO, DP_DTO, 1),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

96

SRII(MODULO, DP_DTO, 2),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

97

SRII(MODULO, DP_DTO, 3),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

98

SRII(PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

99

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_link_encoder.h

68

SRII(RDPCSTX_PHY_CNTL6, RDPCSTX, id)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

102

SRII(PIXEL_RATE_CNTL, blk, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

103

SRII(PIXEL_RATE_CNTL, blk, 1),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

104

SRII(PIXEL_RATE_CNTL, blk, 2),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

105

SRII(PIXEL_RATE_CNTL, blk, 3), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

106

SRII(PIXEL_RATE_CNTL, blk, 4)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

109

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

110

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

111

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

112

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 3), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

113

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 4)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

116

SRII(PIXEL_RATE_CNTL, blk, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

117

SRII(PIXEL_RATE_CNTL, blk, 1)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

120

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

121

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

125

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

126

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

131

SRII(DCFE_CLOCK_CONTROL, DCFE, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

132

SRII(DCFE_CLOCK_CONTROL, DCFE, 1), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

133

SRII(CRTC_H_BLANK_START_END, CRTC, 0),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

134

SRII(CRTC_H_BLANK_START_END, CRTC, 1),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

135

SRII(BLND_V_UPDATE_LOCK, BLND, 0),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

136

SRII(BLND_V_UPDATE_LOCK, BLND, 1),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

137

SRII(BLND_CONTROL, BLND, 0),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

138

SRII(BLND_CONTROL, BLND, 1),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

167

SRII(DCFE_CLOCK_CONTROL, DCFE, 2), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

168

SRII(CRTC_H_BLANK_START_END, CRTC, 2), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

169

SRII(BLND_V_UPDATE_LOCK, BLND, 2), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

170

SRII(BLND_CONTROL, BLND, 2), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

39

SRII(DCFE_CLOCK_CONTROL, DCFE, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

40

SRII(DCFE_CLOCK_CONTROL, DCFE, 1), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

41

SRII(DCFE_CLOCK_CONTROL, DCFE, 2), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

42

SRII(DCFE_CLOCK_CONTROL, DCFE, 3), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

428

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

429

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

43

SRII(DCFE_CLOCK_CONTROL, DCFE, 4), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

430

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

431

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

432

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

433

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

434

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

435

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

44

SRII(DCFE_CLOCK_CONTROL, DCFE, 5), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

48

SRII(BLND_V_UPDATE_LOCK, BLND, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

49

SRII(BLND_V_UPDATE_LOCK, BLND, 1), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

50

SRII(BLND_V_UPDATE_LOCK, BLND, 2), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

51

SRII(BLND_V_UPDATE_LOCK, BLND, 3), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

52

SRII(BLND_V_UPDATE_LOCK, BLND, 4), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

53

SRII(BLND_V_UPDATE_LOCK, BLND, 5), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

54

SRII(BLND_CONTROL, BLND, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

55

SRII(BLND_CONTROL, BLND, 1), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

56

SRII(BLND_CONTROL, BLND, 2), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

57

SRII(BLND_CONTROL, BLND, 3), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

58

SRII(BLND_CONTROL, BLND, 4), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

59

SRII(BLND_CONTROL, BLND, 5)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

62

SRII(PIXEL_RATE_CNTL, blk, inst), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

63

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, inst)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

66

SRII(PIXEL_RATE_CNTL, blk, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

67

SRII(PIXEL_RATE_CNTL, blk, 1), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

68

SRII(PIXEL_RATE_CNTL, blk, 2), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

69

SRII(PIXEL_RATE_CNTL, blk, 3), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

70

SRII(PIXEL_RATE_CNTL, blk, 4), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

71

SRII(PIXEL_RATE_CNTL, blk, 5)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

74

SRII(PIXEL_RATE_CNTL, blk, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

75

SRII(PIXEL_RATE_CNTL, blk, 1)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

78

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

79

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

80

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

81

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 3), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

82

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 4), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

83

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 5)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

86

SRII(PIXEL_RATE_CNTL, blk, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

87

SRII(PIXEL_RATE_CNTL, blk, 1),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

88

SRII(PIXEL_RATE_CNTL, blk, 2),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

89

SRII(PIXEL_RATE_CNTL, blk, 3), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

90

SRII(PIXEL_RATE_CNTL, blk, 4), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

91

SRII(PIXEL_RATE_CNTL, blk, 5)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

94

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

95

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

96

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2),\

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

97

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 3), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

98

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 4), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

99

SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 5)

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

34

SRII(MPCC_TOP_SEL, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

35

SRII(MPCC_BOT_SEL, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

36

SRII(MPCC_CONTROL, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

37

SRII(MPCC_STATUS, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

38

SRII(MPCC_OPP_ID, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

39

SRII(MPCC_BG_G_Y, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

40

SRII(MPCC_BG_R_CR, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

41

SRII(MPCC_BG_B_CB, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

42

SRII(MPCC_SM_CONTROL, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

43

SRII(MPCC_UPDATE_LOCK_SEL, MPCC, inst)

drivers/gpu/drm/amd/display/dc/mpc/dcn10/dcn10_mpc.h

46

SRII(MUX, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

35

SRII(MPCC_TOP_GAIN, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

36

SRII(MPCC_BOT_GAIN_INSIDE, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

37

SRII(MPCC_BOT_GAIN_OUTSIDE, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

38

SRII(MPCC_OGAM_RAMA_START_CNTL_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

39

SRII(MPCC_OGAM_RAMA_START_CNTL_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

40

SRII(MPCC_OGAM_RAMA_START_CNTL_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

41

SRII(MPCC_OGAM_RAMA_SLOPE_CNTL_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

42

SRII(MPCC_OGAM_RAMA_SLOPE_CNTL_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

43

SRII(MPCC_OGAM_RAMA_SLOPE_CNTL_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

44

SRII(MPCC_OGAM_RAMA_END_CNTL1_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

45

SRII(MPCC_OGAM_RAMA_END_CNTL2_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

46

SRII(MPCC_OGAM_RAMA_END_CNTL1_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

47

SRII(MPCC_OGAM_RAMA_END_CNTL2_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

48

SRII(MPCC_OGAM_RAMA_END_CNTL1_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

49

SRII(MPCC_OGAM_RAMA_END_CNTL2_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

50

SRII(MPCC_OGAM_RAMA_REGION_0_1, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

51

SRII(MPCC_OGAM_RAMA_REGION_32_33, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

52

SRII(MPCC_OGAM_RAMB_START_CNTL_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

53

SRII(MPCC_OGAM_RAMB_START_CNTL_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

54

SRII(MPCC_OGAM_RAMB_START_CNTL_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

55

SRII(MPCC_OGAM_RAMB_SLOPE_CNTL_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

56

SRII(MPCC_OGAM_RAMB_SLOPE_CNTL_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

57

SRII(MPCC_OGAM_RAMB_SLOPE_CNTL_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

58

SRII(MPCC_OGAM_RAMB_END_CNTL1_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

59

SRII(MPCC_OGAM_RAMB_END_CNTL2_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

60

SRII(MPCC_OGAM_RAMB_END_CNTL1_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

61

SRII(MPCC_OGAM_RAMB_END_CNTL2_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

62

SRII(MPCC_OGAM_RAMB_END_CNTL1_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

63

SRII(MPCC_OGAM_RAMB_END_CNTL2_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

64

SRII(MPCC_OGAM_RAMB_REGION_0_1, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

65

SRII(MPCC_OGAM_RAMB_REGION_32_33, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

66

SRII(MPCC_MEM_PWR_CTRL, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

67

SRII(MPCC_OGAM_LUT_INDEX, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

68

SRII(MPCC_OGAM_LUT_RAM_CONTROL, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

69

SRII(MPCC_OGAM_LUT_DATA, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

70

SRII(MPCC_OGAM_MODE, MPCC_OGAM, inst)

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

74

SRII(CSC_MODE, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

75

SRII(CSC_C11_C12_A, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

76

SRII(CSC_C33_C34_A, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

77

SRII(CSC_C11_C12_B, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

78

SRII(CSC_C33_C34_B, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

79

SRII(DENORM_CONTROL, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

80

SRII(DENORM_CLAMP_G_Y, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h

81

SRII(DENORM_CLAMP_B_CB, MPC_OUT, inst)

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

100

SRII(MPCC_OGAM_LUT_CONTROL, MPCC_OGAM, inst)

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

104

SRII(CSC_MODE, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

105

SRII(CSC_C11_C12_A, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

106

SRII(CSC_C33_C34_A, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

107

SRII(CSC_C11_C12_B, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

108

SRII(CSC_C33_C34_B, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

109

SRII(DENORM_CONTROL, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

110

SRII(DENORM_CLAMP_G_Y, MPC_OUT, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

111

SRII(DENORM_CLAMP_B_CB, MPC_OUT, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

119

SRII(SHAPER_CONTROL, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

120

SRII(SHAPER_OFFSET_R, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

121

SRII(SHAPER_OFFSET_G, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

122

SRII(SHAPER_OFFSET_B, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

123

SRII(SHAPER_SCALE_R, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

124

SRII(SHAPER_SCALE_G_B, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

125

SRII(SHAPER_LUT_INDEX, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

126

SRII(SHAPER_LUT_DATA, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

127

SRII(SHAPER_LUT_WRITE_EN_MASK, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

128

SRII(SHAPER_RAMA_START_CNTL_B, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

129

SRII(SHAPER_RAMA_START_CNTL_G, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

130

SRII(SHAPER_RAMA_START_CNTL_R, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

131

SRII(SHAPER_RAMA_END_CNTL_B, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

132

SRII(SHAPER_RAMA_END_CNTL_G, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

133

SRII(SHAPER_RAMA_END_CNTL_R, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

134

SRII(SHAPER_RAMA_REGION_0_1, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

135

SRII(SHAPER_RAMA_REGION_2_3, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

136

SRII(SHAPER_RAMA_REGION_4_5, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

137

SRII(SHAPER_RAMA_REGION_6_7, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

138

SRII(SHAPER_RAMA_REGION_8_9, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

139

SRII(SHAPER_RAMA_REGION_10_11, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

140

SRII(SHAPER_RAMA_REGION_12_13, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

141

SRII(SHAPER_RAMA_REGION_14_15, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

142

SRII(SHAPER_RAMA_REGION_16_17, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

143

SRII(SHAPER_RAMA_REGION_18_19, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

144

SRII(SHAPER_RAMA_REGION_20_21, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

145

SRII(SHAPER_RAMA_REGION_22_23, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

146

SRII(SHAPER_RAMA_REGION_24_25, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

147

SRII(SHAPER_RAMA_REGION_26_27, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

148

SRII(SHAPER_RAMA_REGION_28_29, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

149

SRII(SHAPER_RAMA_REGION_30_31, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

150

SRII(SHAPER_RAMA_REGION_32_33, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

151

SRII(SHAPER_RAMB_START_CNTL_B, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

152

SRII(SHAPER_RAMB_START_CNTL_G, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

153

SRII(SHAPER_RAMB_START_CNTL_R, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

154

SRII(SHAPER_RAMB_END_CNTL_B, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

155

SRII(SHAPER_RAMB_END_CNTL_G, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

156

SRII(SHAPER_RAMB_END_CNTL_R, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

157

SRII(SHAPER_RAMB_REGION_0_1, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

158

SRII(SHAPER_RAMB_REGION_2_3, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

159

SRII(SHAPER_RAMB_REGION_4_5, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

160

SRII(SHAPER_RAMB_REGION_6_7, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

161

SRII(SHAPER_RAMB_REGION_8_9, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

162

SRII(SHAPER_RAMB_REGION_10_11, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

163

SRII(SHAPER_RAMB_REGION_12_13, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

164

SRII(SHAPER_RAMB_REGION_14_15, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

165

SRII(SHAPER_RAMB_REGION_16_17, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

166

SRII(SHAPER_RAMB_REGION_18_19, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

167

SRII(SHAPER_RAMB_REGION_20_21, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

168

SRII(SHAPER_RAMB_REGION_22_23, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

169

SRII(SHAPER_RAMB_REGION_24_25, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

170

SRII(SHAPER_RAMB_REGION_26_27, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

171

SRII(SHAPER_RAMB_REGION_28_29, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

172

SRII(SHAPER_RAMB_REGION_30_31, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

173

SRII(SHAPER_RAMB_REGION_32_33, MPC_RMU, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

47

SRII(MPCC_TOP_GAIN, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

48

SRII(MPCC_BOT_GAIN_INSIDE, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

49

SRII(MPCC_BOT_GAIN_OUTSIDE, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

50

SRII(MPCC_MEM_PWR_CTRL, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

51

SRII(MPCC_OGAM_LUT_INDEX, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

52

SRII(MPCC_OGAM_LUT_DATA, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

53

SRII(MPCC_GAMUT_REMAP_COEF_FORMAT, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

54

SRII(MPCC_GAMUT_REMAP_MODE, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

55

SRII(MPC_GAMUT_REMAP_C11_C12_A, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

56

SRII(MPC_GAMUT_REMAP_C33_C34_A, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

57

SRII(MPC_GAMUT_REMAP_C11_C12_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

58

SRII(MPC_GAMUT_REMAP_C33_C34_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

59

SRII(MPCC_OGAM_RAMA_START_CNTL_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

60

SRII(MPCC_OGAM_RAMA_START_CNTL_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

61

SRII(MPCC_OGAM_RAMA_START_CNTL_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

62

SRII(MPCC_OGAM_RAMA_START_SLOPE_CNTL_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

63

SRII(MPCC_OGAM_RAMA_START_SLOPE_CNTL_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

64

SRII(MPCC_OGAM_RAMA_START_SLOPE_CNTL_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

65

SRII(MPCC_OGAM_RAMA_END_CNTL1_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

66

SRII(MPCC_OGAM_RAMA_END_CNTL2_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

67

SRII(MPCC_OGAM_RAMA_END_CNTL1_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

68

SRII(MPCC_OGAM_RAMA_END_CNTL2_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

69

SRII(MPCC_OGAM_RAMA_END_CNTL1_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

70

SRII(MPCC_OGAM_RAMA_END_CNTL2_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

71

SRII(MPCC_OGAM_RAMA_REGION_0_1, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

72

SRII(MPCC_OGAM_RAMA_REGION_32_33, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

73

SRII(MPCC_OGAM_RAMA_OFFSET_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

74

SRII(MPCC_OGAM_RAMA_OFFSET_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

75

SRII(MPCC_OGAM_RAMA_OFFSET_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

76

SRII(MPCC_OGAM_RAMA_START_BASE_CNTL_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

77

SRII(MPCC_OGAM_RAMA_START_BASE_CNTL_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

78

SRII(MPCC_OGAM_RAMA_START_BASE_CNTL_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

79

SRII(MPCC_OGAM_RAMB_START_CNTL_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

80

SRII(MPCC_OGAM_RAMB_START_CNTL_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

81

SRII(MPCC_OGAM_RAMB_START_CNTL_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

82

SRII(MPCC_OGAM_RAMB_START_SLOPE_CNTL_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

83

SRII(MPCC_OGAM_RAMB_START_SLOPE_CNTL_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

84

SRII(MPCC_OGAM_RAMB_START_SLOPE_CNTL_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

85

SRII(MPCC_OGAM_RAMB_END_CNTL1_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

86

SRII(MPCC_OGAM_RAMB_END_CNTL2_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

87

SRII(MPCC_OGAM_RAMB_END_CNTL1_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

88

SRII(MPCC_OGAM_RAMB_END_CNTL2_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

89

SRII(MPCC_OGAM_RAMB_END_CNTL1_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

90

SRII(MPCC_OGAM_RAMB_END_CNTL2_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

91

SRII(MPCC_OGAM_RAMB_REGION_0_1, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

92

SRII(MPCC_OGAM_RAMB_REGION_32_33, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

93

SRII(MPCC_OGAM_RAMB_OFFSET_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

94

SRII(MPCC_OGAM_RAMB_OFFSET_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

95

SRII(MPCC_OGAM_RAMB_OFFSET_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

96

SRII(MPCC_OGAM_RAMB_START_BASE_CNTL_B, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

97

SRII(MPCC_OGAM_RAMB_START_BASE_CNTL_G, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

98

SRII(MPCC_OGAM_RAMB_START_BASE_CNTL_R, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h

99

SRII(MPCC_OGAM_CONTROL, MPCC_OGAM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

100

SRII(MPCC_MCM_3DLUT_OUT_OFFSET_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

101

SRII(MPCC_MCM_1DLUT_CONTROL, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

102

SRII(MPCC_MCM_1DLUT_LUT_INDEX, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

103

SRII(MPCC_MCM_1DLUT_LUT_DATA, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

104

SRII(MPCC_MCM_1DLUT_LUT_CONTROL, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

105

SRII(MPCC_MCM_1DLUT_RAMA_START_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

106

SRII(MPCC_MCM_1DLUT_RAMA_START_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

107

SRII(MPCC_MCM_1DLUT_RAMA_START_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

108

SRII(MPCC_MCM_1DLUT_RAMA_START_SLOPE_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

109

SRII(MPCC_MCM_1DLUT_RAMA_START_SLOPE_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

110

SRII(MPCC_MCM_1DLUT_RAMA_START_SLOPE_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

111

SRII(MPCC_MCM_1DLUT_RAMA_START_BASE_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

112

SRII(MPCC_MCM_1DLUT_RAMA_START_BASE_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

113

SRII(MPCC_MCM_1DLUT_RAMA_START_BASE_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

114

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL1_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

115

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL2_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

116

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL1_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

117

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL2_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

118

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL1_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

119

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL2_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

120

SRII(MPCC_MCM_1DLUT_RAMA_OFFSET_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

121

SRII(MPCC_MCM_1DLUT_RAMA_OFFSET_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

122

SRII(MPCC_MCM_1DLUT_RAMA_OFFSET_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

123

SRII(MPCC_MCM_1DLUT_RAMA_REGION_0_1, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

124

SRII(MPCC_MCM_1DLUT_RAMA_REGION_2_3, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

125

SRII(MPCC_MCM_1DLUT_RAMA_REGION_4_5, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

126

SRII(MPCC_MCM_1DLUT_RAMA_REGION_6_7, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

127

SRII(MPCC_MCM_1DLUT_RAMA_REGION_8_9, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

128

SRII(MPCC_MCM_1DLUT_RAMA_REGION_10_11, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

129

SRII(MPCC_MCM_1DLUT_RAMA_REGION_12_13, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

130

SRII(MPCC_MCM_1DLUT_RAMA_REGION_14_15, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

131

SRII(MPCC_MCM_1DLUT_RAMA_REGION_16_17, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

132

SRII(MPCC_MCM_1DLUT_RAMA_REGION_18_19, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

133

SRII(MPCC_MCM_1DLUT_RAMA_REGION_20_21, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

134

SRII(MPCC_MCM_1DLUT_RAMA_REGION_22_23, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

135

SRII(MPCC_MCM_1DLUT_RAMA_REGION_24_25, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

136

SRII(MPCC_MCM_1DLUT_RAMA_REGION_26_27, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

137

SRII(MPCC_MCM_1DLUT_RAMA_REGION_28_29, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

138

SRII(MPCC_MCM_1DLUT_RAMA_REGION_30_31, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

139

SRII(MPCC_MCM_1DLUT_RAMA_REGION_32_33, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

140

SRII(MPCC_MCM_1DLUT_RAMB_START_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

141

SRII(MPCC_MCM_1DLUT_RAMB_START_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

142

SRII(MPCC_MCM_1DLUT_RAMB_START_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

143

SRII(MPCC_MCM_1DLUT_RAMB_START_SLOPE_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

144

SRII(MPCC_MCM_1DLUT_RAMB_START_SLOPE_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

145

SRII(MPCC_MCM_1DLUT_RAMB_START_SLOPE_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

146

SRII(MPCC_MCM_1DLUT_RAMB_START_BASE_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

147

SRII(MPCC_MCM_1DLUT_RAMB_START_BASE_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

148

SRII(MPCC_MCM_1DLUT_RAMB_START_BASE_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

149

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL1_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

150

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL2_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

151

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL1_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

152

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL2_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

153

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL1_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

154

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL2_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

155

SRII(MPCC_MCM_1DLUT_RAMB_OFFSET_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

156

SRII(MPCC_MCM_1DLUT_RAMB_OFFSET_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

157

SRII(MPCC_MCM_1DLUT_RAMB_OFFSET_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

158

SRII(MPCC_MCM_1DLUT_RAMB_REGION_0_1, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

159

SRII(MPCC_MCM_1DLUT_RAMB_REGION_2_3, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

160

SRII(MPCC_MCM_1DLUT_RAMB_REGION_4_5, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

161

SRII(MPCC_MCM_1DLUT_RAMB_REGION_6_7, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

162

SRII(MPCC_MCM_1DLUT_RAMB_REGION_8_9, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

163

SRII(MPCC_MCM_1DLUT_RAMB_REGION_10_11, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

164

SRII(MPCC_MCM_1DLUT_RAMB_REGION_12_13, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

165

SRII(MPCC_MCM_1DLUT_RAMB_REGION_14_15, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

166

SRII(MPCC_MCM_1DLUT_RAMB_REGION_16_17, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

167

SRII(MPCC_MCM_1DLUT_RAMB_REGION_18_19, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

168

SRII(MPCC_MCM_1DLUT_RAMB_REGION_20_21, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

169

SRII(MPCC_MCM_1DLUT_RAMB_REGION_22_23, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

170

SRII(MPCC_MCM_1DLUT_RAMB_REGION_24_25, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

171

SRII(MPCC_MCM_1DLUT_RAMB_REGION_26_27, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

172

SRII(MPCC_MCM_1DLUT_RAMB_REGION_28_29, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

173

SRII(MPCC_MCM_1DLUT_RAMB_REGION_30_31, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

174

SRII(MPCC_MCM_1DLUT_RAMB_REGION_32_33, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

175

SRII(MPCC_MCM_MEM_PWR_CTRL, MPCC_MCM, inst)

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

36

SRII(MPCC_MOVABLE_CM_LOCATION_CONTROL, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

37

SRII(MPCC_MCM_SHAPER_CONTROL, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

38

SRII(MPCC_MCM_SHAPER_OFFSET_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

39

SRII(MPCC_MCM_SHAPER_OFFSET_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

40

SRII(MPCC_MCM_SHAPER_OFFSET_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

41

SRII(MPCC_MCM_SHAPER_SCALE_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

42

SRII(MPCC_MCM_SHAPER_SCALE_G_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

43

SRII(MPCC_MCM_SHAPER_LUT_INDEX, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

44

SRII(MPCC_MCM_SHAPER_LUT_DATA, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

45

SRII(MPCC_MCM_SHAPER_LUT_WRITE_EN_MASK, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

46

SRII(MPCC_MCM_SHAPER_RAMA_START_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

47

SRII(MPCC_MCM_SHAPER_RAMA_START_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

48

SRII(MPCC_MCM_SHAPER_RAMA_START_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

49

SRII(MPCC_MCM_SHAPER_RAMA_END_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

50

SRII(MPCC_MCM_SHAPER_RAMA_END_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

51

SRII(MPCC_MCM_SHAPER_RAMA_END_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

52

SRII(MPCC_MCM_SHAPER_RAMA_REGION_0_1, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

53

SRII(MPCC_MCM_SHAPER_RAMA_REGION_2_3, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

54

SRII(MPCC_MCM_SHAPER_RAMA_REGION_4_5, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

55

SRII(MPCC_MCM_SHAPER_RAMA_REGION_6_7, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

56

SRII(MPCC_MCM_SHAPER_RAMA_REGION_8_9, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

57

SRII(MPCC_MCM_SHAPER_RAMA_REGION_10_11, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

58

SRII(MPCC_MCM_SHAPER_RAMA_REGION_12_13, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

59

SRII(MPCC_MCM_SHAPER_RAMA_REGION_14_15, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

60

SRII(MPCC_MCM_SHAPER_RAMA_REGION_16_17, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

61

SRII(MPCC_MCM_SHAPER_RAMA_REGION_18_19, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

62

SRII(MPCC_MCM_SHAPER_RAMA_REGION_20_21, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

63

SRII(MPCC_MCM_SHAPER_RAMA_REGION_22_23, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

64

SRII(MPCC_MCM_SHAPER_RAMA_REGION_24_25, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

65

SRII(MPCC_MCM_SHAPER_RAMA_REGION_26_27, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

66

SRII(MPCC_MCM_SHAPER_RAMA_REGION_28_29, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

67

SRII(MPCC_MCM_SHAPER_RAMA_REGION_30_31, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

68

SRII(MPCC_MCM_SHAPER_RAMA_REGION_32_33, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

69

SRII(MPCC_MCM_SHAPER_RAMB_START_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

70

SRII(MPCC_MCM_SHAPER_RAMB_START_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

71

SRII(MPCC_MCM_SHAPER_RAMB_START_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

72

SRII(MPCC_MCM_SHAPER_RAMB_END_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

73

SRII(MPCC_MCM_SHAPER_RAMB_END_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

74

SRII(MPCC_MCM_SHAPER_RAMB_END_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

75

SRII(MPCC_MCM_SHAPER_RAMB_REGION_0_1, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

76

SRII(MPCC_MCM_SHAPER_RAMB_REGION_2_3, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

77

SRII(MPCC_MCM_SHAPER_RAMB_REGION_4_5, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

78

SRII(MPCC_MCM_SHAPER_RAMB_REGION_6_7, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

79

SRII(MPCC_MCM_SHAPER_RAMB_REGION_8_9, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

80

SRII(MPCC_MCM_SHAPER_RAMB_REGION_10_11, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

81

SRII(MPCC_MCM_SHAPER_RAMB_REGION_12_13, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

82

SRII(MPCC_MCM_SHAPER_RAMB_REGION_14_15, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

83

SRII(MPCC_MCM_SHAPER_RAMB_REGION_16_17, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

84

SRII(MPCC_MCM_SHAPER_RAMB_REGION_18_19, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

85

SRII(MPCC_MCM_SHAPER_RAMB_REGION_20_21, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

86

SRII(MPCC_MCM_SHAPER_RAMB_REGION_22_23, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

87

SRII(MPCC_MCM_SHAPER_RAMB_REGION_24_25, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

88

SRII(MPCC_MCM_SHAPER_RAMB_REGION_26_27, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

89

SRII(MPCC_MCM_SHAPER_RAMB_REGION_28_29, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

90

SRII(MPCC_MCM_SHAPER_RAMB_REGION_30_31, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

91

SRII(MPCC_MCM_SHAPER_RAMB_REGION_32_33, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

92

SRII(MPCC_MCM_3DLUT_MODE, MPCC_MCM, inst), /*TODO: may need to add other 3DLUT regs*/\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

93

SRII(MPCC_MCM_3DLUT_INDEX, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

94

SRII(MPCC_MCM_3DLUT_DATA, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

95

SRII(MPCC_MCM_3DLUT_DATA_30BIT, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

96

SRII(MPCC_MCM_3DLUT_READ_WRITE_CONTROL, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

97

SRII(MPCC_MCM_3DLUT_OUT_NORM_FACTOR, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

98

SRII(MPCC_MCM_3DLUT_OUT_OFFSET_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h

99

SRII(MPCC_MCM_3DLUT_OUT_OFFSET_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

108

SRII(MPCC_MCM_FIRST_GAMUT_REMAP_COEF_FORMAT, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

109

SRII(MPCC_MCM_FIRST_GAMUT_REMAP_MODE, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

110

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C11_C12_A, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

111

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C13_C14_A, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

112

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C21_C22_A, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

113

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C23_C24_A, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

114

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C31_C32_A, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

115

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C33_C34_A, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

116

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C11_C12_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

117

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C13_C14_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

118

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C21_C22_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

119

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C23_C24_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

120

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C31_C32_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

121

SRII(MPC_MCM_FIRST_GAMUT_REMAP_C33_C34_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

122

SRII(MPCC_MCM_SECOND_GAMUT_REMAP_COEF_FORMAT, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

123

SRII(MPCC_MCM_SECOND_GAMUT_REMAP_MODE, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

124

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C11_C12_A, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

125

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C13_C14_A, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

126

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C21_C22_A, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

127

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C23_C24_A, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

128

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C31_C32_A, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

129

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C33_C34_A, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

130

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C11_C12_B, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

131

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C13_C14_B, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

132

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C21_C22_B, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

133

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C23_C24_B, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

134

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C31_C32_B, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

135

SRII(MPC_MCM_SECOND_GAMUT_REMAP_C33_C34_B, MPCC_MCM, inst), \

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

136

SRII(MPCC_MCM_3DLUT_FAST_LOAD_STATUS, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h

137

SRII(MPCC_MCM_3DLUT_FAST_LOAD_SELECT, MPCC_MCM, inst)

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

690

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

691

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

692

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

693

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

694

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

695

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

696

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

697

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

697

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

698

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

699

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

700

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

701

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

702

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

703

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

704

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

689

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

690

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

691

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

692

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

693

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

694

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

695

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

696

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

684

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

685

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

686

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

687

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

688

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

689

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

690

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

691

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

541

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

542

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

543

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

544

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

545

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

546

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

547

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

548

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

784

SRII(MUX, MPC_OUT, inst), VUPDATE_SRII(CUR, VUPDATE_LOCK_SET, inst)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

787

MPC_OUT_MUX_COMMON_REG_LIST_DCN1_0_RI(inst), SRII(CSC_MODE, MPC_OUT, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

788

SRII(CSC_C11_C12_A, MPC_OUT, inst), SRII(CSC_C33_C34_A, MPC_OUT, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

789

SRII(CSC_C11_C12_B, MPC_OUT, inst), SRII(CSC_C33_C34_B, MPC_OUT, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

790

SRII(DENORM_CONTROL, MPC_OUT, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

791

SRII(DENORM_CLAMP_G_Y, MPC_OUT, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

792

SRII(DENORM_CLAMP_B_CB, MPC_OUT, inst), SR(MPC_OUT_CSC_COEF_FORMAT)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

795

SRII(MPCC_TOP_SEL, MPCC, inst), SRII(MPCC_BOT_SEL, MPCC, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

796

SRII(MPCC_CONTROL, MPCC, inst), SRII(MPCC_STATUS, MPCC, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

797

SRII(MPCC_OPP_ID, MPCC, inst), SRII(MPCC_BG_G_Y, MPCC, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

798

SRII(MPCC_BG_R_CR, MPCC, inst), SRII(MPCC_BG_B_CB, MPCC, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

799

SRII(MPCC_SM_CONTROL, MPCC, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

800

SRII(MPCC_UPDATE_LOCK_SEL, MPCC, inst)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

803

MPC_COMMON_REG_LIST_DCN1_0_RI(inst), SRII(MPCC_TOP_GAIN, MPCC, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

804

SRII(MPCC_BOT_GAIN_INSIDE, MPCC, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

805

SRII(MPCC_BOT_GAIN_OUTSIDE, MPCC, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

806

SRII(MPCC_MEM_PWR_CTRL, MPCC, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

807

SRII(MPCC_OGAM_LUT_INDEX, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

808

SRII(MPCC_OGAM_LUT_DATA, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

809

SRII(MPCC_GAMUT_REMAP_COEF_FORMAT, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

810

SRII(MPCC_GAMUT_REMAP_MODE, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

811

SRII(MPC_GAMUT_REMAP_C11_C12_A, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

812

SRII(MPC_GAMUT_REMAP_C33_C34_A, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

813

SRII(MPC_GAMUT_REMAP_C11_C12_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

814

SRII(MPC_GAMUT_REMAP_C33_C34_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

815

SRII(MPCC_OGAM_RAMA_START_CNTL_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

816

SRII(MPCC_OGAM_RAMA_START_CNTL_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

817

SRII(MPCC_OGAM_RAMA_START_CNTL_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

818

SRII(MPCC_OGAM_RAMA_START_SLOPE_CNTL_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

819

SRII(MPCC_OGAM_RAMA_START_SLOPE_CNTL_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

820

SRII(MPCC_OGAM_RAMA_START_SLOPE_CNTL_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

821

SRII(MPCC_OGAM_RAMA_END_CNTL1_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

822

SRII(MPCC_OGAM_RAMA_END_CNTL2_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

823

SRII(MPCC_OGAM_RAMA_END_CNTL1_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

824

SRII(MPCC_OGAM_RAMA_END_CNTL2_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

825

SRII(MPCC_OGAM_RAMA_END_CNTL1_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

826

SRII(MPCC_OGAM_RAMA_END_CNTL2_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

827

SRII(MPCC_OGAM_RAMA_REGION_0_1, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

828

SRII(MPCC_OGAM_RAMA_REGION_32_33, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

829

SRII(MPCC_OGAM_RAMA_OFFSET_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

830

SRII(MPCC_OGAM_RAMA_OFFSET_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

831

SRII(MPCC_OGAM_RAMA_OFFSET_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

832

SRII(MPCC_OGAM_RAMA_START_BASE_CNTL_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

833

SRII(MPCC_OGAM_RAMA_START_BASE_CNTL_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

834

SRII(MPCC_OGAM_RAMA_START_BASE_CNTL_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

835

SRII(MPCC_OGAM_RAMB_START_CNTL_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

836

SRII(MPCC_OGAM_RAMB_START_CNTL_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

837

SRII(MPCC_OGAM_RAMB_START_CNTL_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

838

SRII(MPCC_OGAM_RAMB_START_SLOPE_CNTL_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

839

SRII(MPCC_OGAM_RAMB_START_SLOPE_CNTL_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

840

SRII(MPCC_OGAM_RAMB_START_SLOPE_CNTL_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

841

SRII(MPCC_OGAM_RAMB_END_CNTL1_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

842

SRII(MPCC_OGAM_RAMB_END_CNTL2_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

843

SRII(MPCC_OGAM_RAMB_END_CNTL1_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

844

SRII(MPCC_OGAM_RAMB_END_CNTL2_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

845

SRII(MPCC_OGAM_RAMB_END_CNTL1_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

846

SRII(MPCC_OGAM_RAMB_END_CNTL2_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

847

SRII(MPCC_OGAM_RAMB_REGION_0_1, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

848

SRII(MPCC_OGAM_RAMB_REGION_32_33, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

849

SRII(MPCC_OGAM_RAMB_OFFSET_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

850

SRII(MPCC_OGAM_RAMB_OFFSET_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

851

SRII(MPCC_OGAM_RAMB_OFFSET_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

852

SRII(MPCC_OGAM_RAMB_START_BASE_CNTL_B, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

853

SRII(MPCC_OGAM_RAMB_START_BASE_CNTL_G, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

854

SRII(MPCC_OGAM_RAMB_START_BASE_CNTL_R, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

855

SRII(MPCC_OGAM_CONTROL, MPCC_OGAM, inst), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

856

SRII(MPCC_OGAM_LUT_CONTROL, MPCC_OGAM, inst)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

860

SRII(MPCC_MOVABLE_CM_LOCATION_CONTROL, MPCC, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

861

SRII(MPCC_MCM_SHAPER_CONTROL, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

862

SRII(MPCC_MCM_SHAPER_OFFSET_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

863

SRII(MPCC_MCM_SHAPER_OFFSET_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

864

SRII(MPCC_MCM_SHAPER_OFFSET_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

865

SRII(MPCC_MCM_SHAPER_SCALE_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

866

SRII(MPCC_MCM_SHAPER_SCALE_G_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

867

SRII(MPCC_MCM_SHAPER_LUT_INDEX, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

868

SRII(MPCC_MCM_SHAPER_LUT_DATA, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

869

SRII(MPCC_MCM_SHAPER_LUT_WRITE_EN_MASK, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

870

SRII(MPCC_MCM_SHAPER_RAMA_START_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

871

SRII(MPCC_MCM_SHAPER_RAMA_START_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

872

SRII(MPCC_MCM_SHAPER_RAMA_START_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

873

SRII(MPCC_MCM_SHAPER_RAMA_END_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

874

SRII(MPCC_MCM_SHAPER_RAMA_END_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

875

SRII(MPCC_MCM_SHAPER_RAMA_END_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

876

SRII(MPCC_MCM_SHAPER_RAMA_REGION_0_1, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

877

SRII(MPCC_MCM_SHAPER_RAMA_REGION_2_3, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

878

SRII(MPCC_MCM_SHAPER_RAMA_REGION_4_5, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

879

SRII(MPCC_MCM_SHAPER_RAMA_REGION_6_7, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

880

SRII(MPCC_MCM_SHAPER_RAMA_REGION_8_9, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

881

SRII(MPCC_MCM_SHAPER_RAMA_REGION_10_11, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

882

SRII(MPCC_MCM_SHAPER_RAMA_REGION_12_13, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

883

SRII(MPCC_MCM_SHAPER_RAMA_REGION_14_15, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

884

SRII(MPCC_MCM_SHAPER_RAMA_REGION_16_17, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

885

SRII(MPCC_MCM_SHAPER_RAMA_REGION_18_19, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

886

SRII(MPCC_MCM_SHAPER_RAMA_REGION_20_21, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

887

SRII(MPCC_MCM_SHAPER_RAMA_REGION_22_23, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

888

SRII(MPCC_MCM_SHAPER_RAMA_REGION_24_25, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

889

SRII(MPCC_MCM_SHAPER_RAMA_REGION_26_27, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

890

SRII(MPCC_MCM_SHAPER_RAMA_REGION_28_29, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

891

SRII(MPCC_MCM_SHAPER_RAMA_REGION_30_31, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

892

SRII(MPCC_MCM_SHAPER_RAMA_REGION_32_33, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

893

SRII(MPCC_MCM_SHAPER_RAMB_START_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

894

SRII(MPCC_MCM_SHAPER_RAMB_START_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

895

SRII(MPCC_MCM_SHAPER_RAMB_START_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

896

SRII(MPCC_MCM_SHAPER_RAMB_END_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

897

SRII(MPCC_MCM_SHAPER_RAMB_END_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

898

SRII(MPCC_MCM_SHAPER_RAMB_END_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

899

SRII(MPCC_MCM_SHAPER_RAMB_REGION_0_1, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

900

SRII(MPCC_MCM_SHAPER_RAMB_REGION_2_3, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

901

SRII(MPCC_MCM_SHAPER_RAMB_REGION_4_5, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

902

SRII(MPCC_MCM_SHAPER_RAMB_REGION_6_7, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

903

SRII(MPCC_MCM_SHAPER_RAMB_REGION_8_9, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

904

SRII(MPCC_MCM_SHAPER_RAMB_REGION_10_11, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

905

SRII(MPCC_MCM_SHAPER_RAMB_REGION_12_13, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

906

SRII(MPCC_MCM_SHAPER_RAMB_REGION_14_15, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

907

SRII(MPCC_MCM_SHAPER_RAMB_REGION_16_17, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

908

SRII(MPCC_MCM_SHAPER_RAMB_REGION_18_19, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

909

SRII(MPCC_MCM_SHAPER_RAMB_REGION_20_21, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

910

SRII(MPCC_MCM_SHAPER_RAMB_REGION_22_23, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

911

SRII(MPCC_MCM_SHAPER_RAMB_REGION_24_25, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

912

SRII(MPCC_MCM_SHAPER_RAMB_REGION_26_27, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

913

SRII(MPCC_MCM_SHAPER_RAMB_REGION_28_29, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

914

SRII(MPCC_MCM_SHAPER_RAMB_REGION_30_31, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

915

SRII(MPCC_MCM_SHAPER_RAMB_REGION_32_33, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

916

SRII(MPCC_MCM_3DLUT_MODE, MPCC_MCM, inst), /*TODO: may need to add other 3DLUT regs*/\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

917

SRII(MPCC_MCM_3DLUT_INDEX, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

918

SRII(MPCC_MCM_3DLUT_DATA, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

919

SRII(MPCC_MCM_3DLUT_DATA_30BIT, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

920

SRII(MPCC_MCM_3DLUT_READ_WRITE_CONTROL, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

921

SRII(MPCC_MCM_3DLUT_OUT_NORM_FACTOR, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

922

SRII(MPCC_MCM_3DLUT_OUT_OFFSET_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

923

SRII(MPCC_MCM_3DLUT_OUT_OFFSET_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

924

SRII(MPCC_MCM_3DLUT_OUT_OFFSET_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

925

SRII(MPCC_MCM_1DLUT_CONTROL, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

926

SRII(MPCC_MCM_1DLUT_LUT_INDEX, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

927

SRII(MPCC_MCM_1DLUT_LUT_DATA, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

928

SRII(MPCC_MCM_1DLUT_LUT_CONTROL, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

929

SRII(MPCC_MCM_1DLUT_RAMA_START_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

930

SRII(MPCC_MCM_1DLUT_RAMA_START_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

931

SRII(MPCC_MCM_1DLUT_RAMA_START_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

932

SRII(MPCC_MCM_1DLUT_RAMA_START_SLOPE_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

933

SRII(MPCC_MCM_1DLUT_RAMA_START_SLOPE_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

934

SRII(MPCC_MCM_1DLUT_RAMA_START_SLOPE_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

935

SRII(MPCC_MCM_1DLUT_RAMA_START_BASE_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

936

SRII(MPCC_MCM_1DLUT_RAMA_START_BASE_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

937

SRII(MPCC_MCM_1DLUT_RAMA_START_BASE_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

938

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL1_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

939

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL2_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

940

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL1_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

941

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL2_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

942

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL1_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

943

SRII(MPCC_MCM_1DLUT_RAMA_END_CNTL2_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

944

SRII(MPCC_MCM_1DLUT_RAMA_OFFSET_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

945

SRII(MPCC_MCM_1DLUT_RAMA_OFFSET_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

946

SRII(MPCC_MCM_1DLUT_RAMA_OFFSET_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

947

SRII(MPCC_MCM_1DLUT_RAMA_REGION_0_1, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

948

SRII(MPCC_MCM_1DLUT_RAMA_REGION_2_3, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

949

SRII(MPCC_MCM_1DLUT_RAMA_REGION_4_5, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

950

SRII(MPCC_MCM_1DLUT_RAMA_REGION_6_7, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

951

SRII(MPCC_MCM_1DLUT_RAMA_REGION_8_9, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

952

SRII(MPCC_MCM_1DLUT_RAMA_REGION_10_11, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

953

SRII(MPCC_MCM_1DLUT_RAMA_REGION_12_13, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

954

SRII(MPCC_MCM_1DLUT_RAMA_REGION_14_15, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

955

SRII(MPCC_MCM_1DLUT_RAMA_REGION_16_17, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

956

SRII(MPCC_MCM_1DLUT_RAMA_REGION_18_19, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

957

SRII(MPCC_MCM_1DLUT_RAMA_REGION_20_21, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

958

SRII(MPCC_MCM_1DLUT_RAMA_REGION_22_23, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

959

SRII(MPCC_MCM_1DLUT_RAMA_REGION_24_25, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

960

SRII(MPCC_MCM_1DLUT_RAMA_REGION_26_27, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

961

SRII(MPCC_MCM_1DLUT_RAMA_REGION_28_29, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

962

SRII(MPCC_MCM_1DLUT_RAMA_REGION_30_31, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

963

SRII(MPCC_MCM_1DLUT_RAMA_REGION_32_33, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

964

SRII(MPCC_MCM_1DLUT_RAMB_START_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

965

SRII(MPCC_MCM_1DLUT_RAMB_START_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

966

SRII(MPCC_MCM_1DLUT_RAMB_START_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

967

SRII(MPCC_MCM_1DLUT_RAMB_START_SLOPE_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

968

SRII(MPCC_MCM_1DLUT_RAMB_START_SLOPE_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

969

SRII(MPCC_MCM_1DLUT_RAMB_START_SLOPE_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

970

SRII(MPCC_MCM_1DLUT_RAMB_START_BASE_CNTL_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

971

SRII(MPCC_MCM_1DLUT_RAMB_START_BASE_CNTL_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

972

SRII(MPCC_MCM_1DLUT_RAMB_START_BASE_CNTL_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

973

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL1_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

974

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL2_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

975

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL1_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

976

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL2_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

977

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL1_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

978

SRII(MPCC_MCM_1DLUT_RAMB_END_CNTL2_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

979

SRII(MPCC_MCM_1DLUT_RAMB_OFFSET_B, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

980

SRII(MPCC_MCM_1DLUT_RAMB_OFFSET_G, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

981

SRII(MPCC_MCM_1DLUT_RAMB_OFFSET_R, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

982

SRII(MPCC_MCM_1DLUT_RAMB_REGION_0_1, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

983

SRII(MPCC_MCM_1DLUT_RAMB_REGION_2_3, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

984

SRII(MPCC_MCM_1DLUT_RAMB_REGION_4_5, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

985

SRII(MPCC_MCM_1DLUT_RAMB_REGION_6_7, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

986

SRII(MPCC_MCM_1DLUT_RAMB_REGION_8_9, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

987

SRII(MPCC_MCM_1DLUT_RAMB_REGION_10_11, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

988

SRII(MPCC_MCM_1DLUT_RAMB_REGION_12_13, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

989

SRII(MPCC_MCM_1DLUT_RAMB_REGION_14_15, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

990

SRII(MPCC_MCM_1DLUT_RAMB_REGION_16_17, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

991

SRII(MPCC_MCM_1DLUT_RAMB_REGION_18_19, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

992

SRII(MPCC_MCM_1DLUT_RAMB_REGION_20_21, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

993

SRII(MPCC_MCM_1DLUT_RAMB_REGION_22_23, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

994

SRII(MPCC_MCM_1DLUT_RAMB_REGION_24_25, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

995

SRII(MPCC_MCM_1DLUT_RAMB_REGION_26_27, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

996

SRII(MPCC_MCM_1DLUT_RAMB_REGION_28_29, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

997

SRII(MPCC_MCM_1DLUT_RAMB_REGION_30_31, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

998

SRII(MPCC_MCM_1DLUT_RAMB_REGION_32_33, MPCC_MCM, inst),\

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h

999

SRII(MPCC_MCM_MEM_PWR_CTRL, MPCC_MCM, inst)

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

537

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

538

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

539

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

540

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

541

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

542

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

543

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

544

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h

174

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h

175

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h

176

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h

177

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h

178

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h

179

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h

180

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h

181

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.h

35

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.h

36

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.h

37

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.h

38

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.h

39

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.h

40

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.h

41

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.h

42

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

516

SRII(PIXEL_RATE_CNTL, OTG, 0), \

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

517

SRII(PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

518

SRII(PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

519

SRII(PIXEL_RATE_CNTL, OTG, 3),\

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

520

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

521

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

522

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

523

SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\