SRI2_DWB
SRI2_DWB(WB_ENABLE, CNV, inst),\
SRI2_DWB(WB_EC_CONFIG, CNV, inst),\
SRI2_DWB(CNV_MODE, CNV, inst),\
SRI2_DWB(CNV_WINDOW_START, CNV, inst),\
SRI2_DWB(CNV_WINDOW_SIZE, CNV, inst),\
SRI2_DWB(CNV_UPDATE, CNV, inst),\
SRI2_DWB(CNV_SOURCE_SIZE, CNV, inst),\
SRI2_DWB(CNV_TEST_CNTL, CNV, inst),\
SRI2_DWB(CNV_TEST_CRC_RED, CNV, inst),\
SRI2_DWB(CNV_TEST_CRC_GREEN, CNV, inst),\
SRI2_DWB(CNV_TEST_CRC_BLUE, CNV, inst),\
SRI2_DWB(WBSCL_COEF_RAM_SELECT, WBSCL, inst),\
SRI2_DWB(WBSCL_COEF_RAM_TAP_DATA, WBSCL, inst),\
SRI2_DWB(WBSCL_MODE, WBSCL, inst),\
SRI2_DWB(WBSCL_TAP_CONTROL, WBSCL, inst),\
SRI2_DWB(WBSCL_DEST_SIZE, WBSCL, inst),\
SRI2_DWB(WBSCL_HORZ_FILTER_SCALE_RATIO, WBSCL, inst),\
SRI2_DWB(WBSCL_HORZ_FILTER_INIT_Y_RGB, WBSCL, inst),\
SRI2_DWB(WBSCL_HORZ_FILTER_INIT_CBCR, WBSCL, inst),\
SRI2_DWB(WBSCL_VERT_FILTER_SCALE_RATIO, WBSCL, inst),\
SRI2_DWB(WBSCL_VERT_FILTER_INIT_Y_RGB, WBSCL, inst),\
SRI2_DWB(WBSCL_VERT_FILTER_INIT_CBCR, WBSCL, inst),\
SRI2_DWB(WBSCL_ROUND_OFFSET, WBSCL, inst),\
SRI2_DWB(WBSCL_OVERFLOW_STATUS, WBSCL, inst),\
SRI2_DWB(WBSCL_COEF_RAM_CONFLICT_STATUS, WBSCL, inst),\
SRI2_DWB(WBSCL_TEST_CNTL, WBSCL, inst),\
SRI2_DWB(WBSCL_TEST_CRC_RED, WBSCL, inst),\
SRI2_DWB(WBSCL_TEST_CRC_GREEN, WBSCL, inst),\
SRI2_DWB(WBSCL_TEST_CRC_BLUE, WBSCL, inst),\
SRI2_DWB(WBSCL_BACKPRESSURE_CNT_EN, WBSCL, inst),\
SRI2_DWB(WB_MCIF_BACKPRESSURE_CNT, WBSCL, inst),\
SRI2_DWB(WBSCL_CLAMP_Y_RGB, WBSCL, inst),\
SRI2_DWB(WBSCL_CLAMP_CBCR, WBSCL, inst),\
SRI2_DWB(WBSCL_OUTSIDE_PIX_STRATEGY, WBSCL, inst),\
SRI2_DWB(WBSCL_OUTSIDE_PIX_STRATEGY_CBCR, WBSCL, inst),\
SRI2_DWB(WBSCL_DEBUG, WBSCL, inst),\
SRI2_DWB(WBSCL_TEST_DEBUG_INDEX, WBSCL, inst),\
SRI2_DWB(WBSCL_TEST_DEBUG_DATA, WBSCL, inst),\
SRI2_DWB(WB_DEBUG_CTRL, CNV, inst),\
SRI2_DWB(WB_DBG_MODE, CNV, inst),\
SRI2_DWB(WB_HW_DEBUG, CNV, inst),\
SRI2_DWB(CNV_TEST_DEBUG_INDEX, CNV, inst),\
SRI2_DWB(CNV_TEST_DEBUG_DATA, CNV, inst),\
SRI2_DWB(WB_SOFT_RESET, CNV, inst),\
SRI2_DWB(WB_WARM_UP_MODE_CTL1, CNV, inst),\
SRI2_DWB(WB_WARM_UP_MODE_CTL2, CNV, inst)