SRBM_GFX_CNTL
srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, PIPEID, pipe);
srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, MEID, me);
srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, VMID, vmid);
srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, QUEUEID, queue);
WREG32(SRBM_GFX_CNTL, srbm_gfx_cntl);
radeon_ring_write(ring, SRBM_GFX_CNTL >> 2);
radeon_ring_write(ring, SRBM_GFX_CNTL >> 2);
radeon_ring_write(ring, SRBM_GFX_CNTL >> 2);
radeon_ring_write(ring, SRBM_GFX_CNTL >> 2);
WREG32(SRBM_GFX_CNTL, RINGID(ring));