SR2A
unsigned char SR28,SR29,SR2A;
viafb_write_reg(SR2A, VIASR, sr2a);
viafb_write_reg(SR2A, VIASR, sr2a);
viafb_write_reg_mask(SR2A, VIASR, 0, BIT4);
viafb_write_reg_mask(SR2A, VIASR, 0x10, BIT4);
sr2a = viafb_read_reg(VIASR, SR2A);
viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1);
sr2a = viafb_read_reg(VIASR, SR2A);
viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1);
viafb_write_reg_mask(SR2A, VIASR,
viafb_write_reg_mask(SR2A, VIASR,
(viafb_read_reg(VIASR, SR2A) & BIT5) >> 4 |
(viafb_read_reg(VIASR, SR2A) & BIT4) >> 3 |
viafb_write_reg_mask(SR2A, VIASR,
viafb_write_reg_mask(SR2A, VIASR,
{VIASR, SR2A, 0xFF, 0x00}, /* Power Management Control 5 */
{VIASR, SR2A, 0xFF, 0x00},
{VIASR, SR2A, 0xF0, 0x00},
{VIASR, SR2A, 0xFF, 0x00},
{VIASR, SR2A, 0x0F, 0x00},
{VIASR, SR2A, 0x0F, 0x00},