SR1E
viafb_write_reg(SR1E, VIASR, sr1e);
viafb_write_reg(SR1E, VIASR, sr1e);
RegSR1E = viafb_read_reg(VIASR, SR1E);
viafb_write_reg(SR1E, VIASR, RegSR1E | 0x30);
RegSR1E = viafb_read_reg(VIASR, SR1E);
viafb_write_reg(SR1E, VIASR, RegSR1E | 0xF0);
viafb_write_reg(SR1E, VIASR, RegSR1E);
sr1e = viafb_read_reg(VIASR, SR1E);
viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT6 + BIT7);
sr1e = viafb_read_reg(VIASR, SR1E);
viafb_write_reg_mask(SR1E, VIASR, 0xF0, BIT4 +
viafb_write_reg_mask(SR1E, VIASR,
viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30);
viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30);
(viafb_read_reg(VIASR, SR1E) & BIT2) >> 2;
viafb_write_reg_mask(SR1E, VIASR,
{VIASR, SR1E, 0xFF, 0x01}, /* Power Management Control */
{VIASR, SR1E, 0xFF, 0x01},
{VIASR, SR1E, 0x0F, 0x01},
{VIASR, SR1E, 0x07, 0x01},
struct io_reg CLE266_ModeXregs[] = { {VIASR, SR1E, 0xF0, 0x00},
{VIASR, SR1E, 0xFF, 0x01},