SOFT_RST
!(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
reg_write(RESET_CONTROL, SOFT_RST);
!(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
emac_reg_update32(adpt->base + EMAC_DMA_MAS_CTRL, 0, SOFT_RST);
fsi_master_mask_set(master, SOFT_RST, IR, 0);
fsi_master_mask_set(master, SOFT_RST, IR, IR);