SPLL_PLL_ENABLE
intel_de_read(display, SPLL_CTL) & SPLL_PLL_ENABLE,
SPLL_PLL_ENABLE | SPLL_FREQ_1350MHz | SPLL_REF_MUXED_SSC;
intel_de_rmw(display, SPLL_CTL, SPLL_PLL_ENABLE, 0);
return val & SPLL_PLL_ENABLE;
if ((ctl & SPLL_PLL_ENABLE) == 0)