SP
; - K mode: add the offset from current SP where H/w starts auto push
; 2. Upon entry SP is always saved (for any inspection, unwinding etc),
lr r10, [AUX_USER_SP] ; U mode SP
add2.nz r10, r10, SZ_PT_REGS/4 ; K mode SP
st r10, [sp, PT_sp] ; SP (pt_regs->sp)
; Restore SP (into AUX_USER_SP) only if returning to U mode
ld r10, [sp, PT_sp] ; SP (pt_regs->sp)
; SP points to PC/STAT32: hw restores them despite NO_AUTOSAVE
btst r0, STATUS_U_BIT ; Z flag set if K, used in restoring SP
; 1. SP auto-switched to kernel mode stack
; At the end, SP points to pt_regs
; 1. SP auto-switched to kernel mode stack
; At the end, SP points to pt_regs
unsigned long *vsp = (unsigned long *)ctrl->vrs[SP];
ctrl->vrs[SP] = (unsigned long)vsp;
unsigned long *vsp = (unsigned long *)ctrl->vrs[SP];
ctrl->vrs[SP] = (unsigned long)vsp;
unsigned long *vsp = (unsigned long *)ctrl->vrs[SP];
ctrl->vrs[SP] = (unsigned long)vsp;
ctrl->vrs[SP] += ((insn & 0x3f) << 2) + 4;
ctrl->vrs[SP] -= ((insn & 0x3f) << 2) + 4;
ctrl->vrs[SP] = ctrl->vrs[insn & 0x0f];
ctrl->vrs[SP] += 0x204 + (uleb128 << 2);
ctrl->vrs[FP], ctrl->vrs[SP], ctrl->vrs[LR], ctrl->vrs[PC]);
ctrl.vrs[SP] = frame->sp;
if ((ctrl.sp_high - ctrl.vrs[SP]) < sizeof(ctrl.vrs))
if (ctrl.vrs[SP] < sp_low || ctrl.vrs[SP] > ctrl.sp_high)
if (frame->pc == ctrl.vrs[PC] && frame->sp == ctrl.vrs[SP])
frame->sp = ctrl.vrs[SP];
REGS(SP, 0, SP, 0, NOSPPC)),
REGS(SP, 0, NOPC, 0, NOSPPC)),
REGS(SP, 0, NOPC, 0, 0)),
REGS(SP, 0, SP, 0, 0)),
# Get my SP from the global variable
# Set the SP global variable to zero so the master knows we've started
{"ddedpd", XRC(59,322,0), X_MASK, POWER6, PPCVLE, {SP, FRT, FRB}},
{"ddedpd.", XRC(59,322,1), X_MASK, POWER6, PPCVLE, {SP, FRT, FRB}},
{"ddedpdq", XRC(63,322,0), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}},
{"ddedpdq.", XRC(63,322,1), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}},
#define S SP + 1
do { *prog++ = LD32I | RS1(SP) | S13(BIAS - (OFF)) | RD(DEST); \
do { *prog++ = ST32I | RS1(SP) | S13(BIAS - (OFF)) | RD(SRC); \
*prog++ = (SUB | IMMED | RS1(SP) | S13(SZ) | RD(SP))
*prog++ = (ADD | IMMED | RS1(SP) | S13(SZ) | RD(SP))
emit_alu3_K(ADD, SP, STACK_BIAS + 128, tmp, ctx);
emit(SAVE | IMMED | RS1(SP) | S13(-stack_needed) | RD(SP), ctx);
emit(ST32 | IMMED | RS1(SP) | S13(off) | RD(G0), ctx);
emit(LD32 | IMMED | RS1(SP) | S13(off) | RD(tmp), ctx);
emit(ST32 | IMMED | RS1(SP) | S13(off) | RD(tmp), ctx);
R(SP);
SP(regs) -= 6;
do_int(regs, trapno, (unsigned char __user *) (regs->pt.ss << 4), SP(regs));
sp = SP(regs);
SP(regs) -= 4;
SP(regs) -= 2;
SP(regs) += 4;
SP(regs) += 2;
SP(regs) += 12;
SP(regs) += 6;
PUTREG(SP, sp);
PUTREG(SP, sp_at_signal);
GETREG(SP, sp);
WREG32(CG_PG_CTRL, SP(p) | SU(u));
write_reg_le32(par->dc_regs, SP, line_pitch);
write_reg_le32(par->dc_regs, SP, sp);
if (rr->u.SP.magic[0] != 0xbe)
if (rr->u.SP.magic[1] != 0xef)
ISOFS_SB(inode->i_sb)->s_rock_offset = rr->u.SP.skip;
struct SU_SP_s SP;
SP(8),
SP(16),
SP(32),
SP(64),
SP(128),
SP(SG_CHUNK_SIZE)
FLAG(SP),
DEFINE_REGSET(SP, 0x60); /* SPDIF out */
PUSHMARK(SP);
PUSHMARK(SP);
PUSHMARK(SP);
PUSHMARK(SP);
PUSHMARK(SP);
PUSHMARK(SP);
PUSHMARK(SP);
PUSHMARK(SP);