SOUTH_CHICKEN1
alt = intel_de_read(display, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
return intel_de_read(display, SOUTH_CHICKEN1) & ICP_SECOND_PPS_IO_SELECT;
intel_de_rmw(display, SOUTH_CHICKEN1, SPT_PWM_GRANULARITY,
intel_de_rmw(display, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS);
intel_de_rmw(display, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, 0);
temp = intel_de_read(display, SOUTH_CHICKEN1);
intel_de_write(display, SOUTH_CHICKEN1, temp);
intel_de_posting_read(display, SOUTH_CHICKEN1);
intel_de_rmw(display, SOUTH_CHICKEN1, 0, val);
intel_de_rmw(display, SOUTH_CHICKEN1, CHASSIS_CLK_REQ_DURATION_MASK,
intel_de_rmw(display, SOUTH_CHICKEN1,
intel_de_rmw(display, SOUTH_CHICKEN1, 0, val);
return intel_de_read(display, SOUTH_CHICKEN1) & ICP_SECOND_PPS_IO_SELECT;
MMIO_D(SOUTH_CHICKEN1);