SOUTH_CHICKEN2
alt = intel_de_read(display, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
intel_de_rmw(display, SOUTH_CHICKEN2, LPT_PWM_GRANULARITY,
intel_de_rmw(display, SOUTH_CHICKEN2, 0, FDI_MPHY_IOSFSB_RESET_CTL);
ret = intel_de_wait_for_set_us(display, SOUTH_CHICKEN2,
intel_de_rmw(display, SOUTH_CHICKEN2, FDI_MPHY_IOSFSB_RESET_CTL, 0);
ret = intel_de_wait_for_clear_us(display, SOUTH_CHICKEN2,
MMIO_DH(SOUTH_CHICKEN2, D_ALL, NULL, south_chicken2_mmio_write);
intel_uncore_rmw(&i915->uncore, SOUTH_CHICKEN2, 0, DPLS_EDP_PPS_FIX_DIS);
MMIO_D(SOUTH_CHICKEN2);
iowrite32(0x00000005, mmio_base + SOUTH_CHICKEN2);